{"id":"https://openalex.org/W2128202365","doi":"https://doi.org/10.1109/jssc.2012.2185169","title":"Isolation Techniques Against Substrate Noise Coupling Utilizing Through Silicon Via (TSV) Process for RF/Mixed-Signal SoCs","display_name":"Isolation Techniques Against Substrate Noise Coupling Utilizing Through Silicon Via (TSV) Process for RF/Mixed-Signal SoCs","publication_year":2012,"publication_date":"2012-02-22","ids":{"openalex":"https://openalex.org/W2128202365","doi":"https://doi.org/10.1109/jssc.2012.2185169","mag":"2128202365"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2012.2185169","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2012.2185169","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023498095","display_name":"Shinichiro Uemura","orcid":null},"institutions":[{"id":"https://openalex.org/I1283155146","display_name":"Panasonic (Japan)","ror":"https://ror.org/011tm7n37","country_code":"JP","type":"company","lineage":["https://openalex.org/I1283155146"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shinichiro Uemura","raw_affiliation_strings":["Digital Core Development Center, Panasonic Corporation, Moriguchi, Osaka, Japan","Digital Core Dev. Center, Panasonic Corp., Moriguchi, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Digital Core Development Center, Panasonic Corporation, Moriguchi, Osaka, Japan","institution_ids":["https://openalex.org/I1283155146"]},{"raw_affiliation_string":"Digital Core Dev. Center, Panasonic Corp., Moriguchi, Japan","institution_ids":["https://openalex.org/I1283155146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113508097","display_name":"Yukio Hiraoka","orcid":null},"institutions":[{"id":"https://openalex.org/I1283155146","display_name":"Panasonic (Japan)","ror":"https://ror.org/011tm7n37","country_code":"JP","type":"company","lineage":["https://openalex.org/I1283155146"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yukio Hiraoka","raw_affiliation_strings":["Digital Core Development Center, Panasonic Corporation, Moriguchi, Osaka, Japan","Digital Core Dev. Center, Panasonic Corp., Moriguchi, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Digital Core Development Center, Panasonic Corporation, Moriguchi, Osaka, Japan","institution_ids":["https://openalex.org/I1283155146"]},{"raw_affiliation_string":"Digital Core Dev. Center, Panasonic Corp., Moriguchi, Japan","institution_ids":["https://openalex.org/I1283155146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110489083","display_name":"Takayuki Kai","orcid":null},"institutions":[{"id":"https://openalex.org/I1283155146","display_name":"Panasonic (Japan)","ror":"https://ror.org/011tm7n37","country_code":"JP","type":"company","lineage":["https://openalex.org/I1283155146"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takayuki Kai","raw_affiliation_strings":["Corporate Manufacturing Innovation Division, Panasonic Corporation, Kadoma, Osaka, Japan","Corp. Manuf. Innovation Div., Panasonic Corp., Kadoma, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Corporate Manufacturing Innovation Division, Panasonic Corporation, Kadoma, Osaka, Japan","institution_ids":["https://openalex.org/I1283155146"]},{"raw_affiliation_string":"Corp. Manuf. Innovation Div., Panasonic Corp., Kadoma, Japan","institution_ids":["https://openalex.org/I1283155146"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048987876","display_name":"Shiro Dosho","orcid":null},"institutions":[{"id":"https://openalex.org/I1283155146","display_name":"Panasonic (Japan)","ror":"https://ror.org/011tm7n37","country_code":"JP","type":"company","lineage":["https://openalex.org/I1283155146"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shiro Dosho","raw_affiliation_strings":["Digital Core Development Center, Panasonic Corporation, Moriguchi, Osaka, Japan","Digital Core Dev. Center, Panasonic Corp., Moriguchi, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Digital Core Development Center, Panasonic Corporation, Moriguchi, Osaka, Japan","institution_ids":["https://openalex.org/I1283155146"]},{"raw_affiliation_string":"Digital Core Dev. Center, Panasonic Corp., Moriguchi, Japan","institution_ids":["https://openalex.org/I1283155146"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.4977,"has_fulltext":false,"cited_by_count":40,"citation_normalized_percentile":{"value":0.93194537,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"47","issue":"4","first_page":"810","last_page":"816"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10460","display_name":"Electronic Packaging and Soldering Technologies","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/substrate-coupling","display_name":"Substrate coupling","score":0.6328420639038086},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.6161471605300903},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.6005206108093262},{"id":"https://openalex.org/keywords/shallow-trench-isolation","display_name":"Shallow trench isolation","score":0.5505910515785217},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5180252194404602},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5159628987312317},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5157971382141113},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.504663348197937},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4854760468006134},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4655153751373291},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.46445274353027344},{"id":"https://openalex.org/keywords/resistive-touchscreen","display_name":"Resistive touchscreen","score":0.4571317434310913},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.44879215955734253},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4419430196285248},{"id":"https://openalex.org/keywords/substrate","display_name":"Substrate (aquarium)","score":0.42876309156417847},{"id":"https://openalex.org/keywords/coupling","display_name":"Coupling (piping)","score":0.42082110047340393},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.37491297721862793},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3728882670402527},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32781267166137695},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.32282716035842896},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.2994537949562073},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.22857028245925903},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22795721888542175},{"id":"https://openalex.org/keywords/trench","display_name":"Trench","score":0.1627880036830902},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11832711100578308},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.08838120102882385}],"concepts":[{"id":"https://openalex.org/C51674796","wikidata":"https://www.wikidata.org/wiki/Q7632167","display_name":"Substrate coupling","level":4,"score":0.6328420639038086},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.6161471605300903},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.6005206108093262},{"id":"https://openalex.org/C105066941","wikidata":"https://www.wikidata.org/wiki/Q1424524","display_name":"Shallow trench isolation","level":4,"score":0.5505910515785217},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5180252194404602},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5159628987312317},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5157971382141113},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.504663348197937},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4854760468006134},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4655153751373291},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.46445274353027344},{"id":"https://openalex.org/C6899612","wikidata":"https://www.wikidata.org/wiki/Q852911","display_name":"Resistive touchscreen","level":2,"score":0.4571317434310913},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.44879215955734253},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4419430196285248},{"id":"https://openalex.org/C2777289219","wikidata":"https://www.wikidata.org/wiki/Q7632154","display_name":"Substrate (aquarium)","level":2,"score":0.42876309156417847},{"id":"https://openalex.org/C131584629","wikidata":"https://www.wikidata.org/wiki/Q4308705","display_name":"Coupling (piping)","level":2,"score":0.42082110047340393},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.37491297721862793},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3728882670402527},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32781267166137695},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.32282716035842896},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.2994537949562073},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.22857028245925903},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22795721888542175},{"id":"https://openalex.org/C155310634","wikidata":"https://www.wikidata.org/wiki/Q1852785","display_name":"Trench","level":3,"score":0.1627880036830902},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11832711100578308},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.08838120102882385},{"id":"https://openalex.org/C111368507","wikidata":"https://www.wikidata.org/wiki/Q43518","display_name":"Oceanography","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2012.2185169","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2012.2185169","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1548001775","https://openalex.org/W1881772341","https://openalex.org/W1970664635","https://openalex.org/W1989898406","https://openalex.org/W2012182877","https://openalex.org/W2086481541","https://openalex.org/W2107304970","https://openalex.org/W2112928135","https://openalex.org/W2119581572","https://openalex.org/W2150692149","https://openalex.org/W3145698303","https://openalex.org/W4231938743","https://openalex.org/W6677859964"],"related_works":["https://openalex.org/W2150860081","https://openalex.org/W2153997870","https://openalex.org/W2099412750","https://openalex.org/W2137446527","https://openalex.org/W4248520870","https://openalex.org/W2138788278","https://openalex.org/W2142764951","https://openalex.org/W4235706090","https://openalex.org/W2350039457","https://openalex.org/W2019635822"],"abstract_inverted_index":{"The":[0,15,63,106,143],"isolation":[1,30,77,133,161],"techniques":[2,134,162],"against":[3],"substrate":[4,100,166],"noise":[5,87,167],"coupling":[6,168],"utilizing":[7],"through":[8],"silicon":[9,99],"via":[10],"(TSV)":[11],"process":[12],"are":[13,94,163],"described.":[14],"trench":[16],"shape":[17],"TSV":[18,48,111],"encloses":[19],"the":[20,29,35,47,52,57,61,72,75,86,158],"RF":[21,36],"circuit":[22,80],"on":[23,96],"a":[24,97],"SoC":[25],"chip":[26],"to":[27,51,70,84],"improve":[28],"between":[31],"digital":[32],"circuits":[33,37],"and":[34,116,123,141,149],"without":[38],"constraints":[39],"of":[40,60,74,103,109,157,169],"on-chip":[41],"interconnect":[42],"above":[43],"first":[44],"metal":[45,55],"as":[46,136],"is":[49,68,82,128],"connected":[50],"grounded":[53],"1st":[54],"from":[56],"back":[58],"side":[59],"substrate.":[62],"analysis":[64],"with":[65,101,146],"simplified":[66],"model":[67,81],"proposed":[69,76],"show":[71],"effect":[73],"techniques.":[78],"Mesh":[79],"applied":[83],"simulate":[85],"distribution":[88],"in":[89],"detail.":[90],"Various":[91],"test":[92],"patterns":[93],"fabricated":[95],"CMOS":[98],"resistivity":[102],"10":[104],"\u03a9cm.":[105],"measurement":[107],"pattern":[108,145],"H-shaped":[110],"confirms":[112],"about":[113],"30":[114],"dB":[115,118,155],"40":[117],"improvement":[119,156],"at":[120],"100":[121],"MHz":[122],"1":[124],"GHz":[125],"respectively,":[126],"which":[127],"much":[129],"better":[130],"than":[131],"conventional":[132],"such":[135],"guard":[137],"ring,":[138],"Deep":[139],"N-well":[140],"DTI.":[142],"combinational":[144],"TSV,":[147],"DTI":[148],"high":[150],"resistive":[151],"layer":[152],"shows":[153],"60":[154],"isolation.":[159],"Proposed":[160],"useful":[164],"for":[165],"future":[170],"RF/mixed-signal":[171],"SoCs.":[172]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}