{"id":"https://openalex.org/W2567151605","doi":"https://doi.org/10.1109/jssc.2011.2164032","title":"250 Mbps\u20135 Gbps Wide-Range CDR With Digital Vernier Phase Shifting and Dual-Mode Control in 0.13 $\\mu$m CMOS","display_name":"250 Mbps\u20135 Gbps Wide-Range CDR With Digital Vernier Phase Shifting and Dual-Mode Control in 0.13 $\\mu$m CMOS","publication_year":2011,"publication_date":"2011-09-12","ids":{"openalex":"https://openalex.org/W2567151605","doi":"https://doi.org/10.1109/jssc.2011.2164032","mag":"2567151605"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2011.2164032","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2011.2164032","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066470707","display_name":"Sang\u2010Yoon Lee","orcid":"https://orcid.org/0000-0002-0032-1440"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Sang-Yoon Lee","raw_affiliation_strings":["Department of Electrical Engineering, Seoul National University, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077521123","display_name":"Hyung-Rok Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyung-Rok Lee","raw_affiliation_strings":["Department of Electrical Engineering, Seoul National University, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111831570","display_name":"Young-Ho Kwak","orcid":null},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Young-Ho Kwak","raw_affiliation_strings":["Department of Electronics and Computer Engineering, Korea University, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Computer Engineering, Korea University, South Korea","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061470672","display_name":"Woo\u2010Seok Choi","orcid":"https://orcid.org/0000-0002-3556-8689"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Woo-Seok Choi","raw_affiliation_strings":["Department of Electrical Engineering, Seoul National University, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032173975","display_name":"Byoung-Joo Yoo","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Byoung-Joo Yoo","raw_affiliation_strings":["Department of Electrical Engineering, Seoul National University, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102301157","display_name":"Daeyun Shim","orcid":null},"institutions":[{"id":"https://openalex.org/I93085520","display_name":"Silicon Labs (United States)","ror":"https://ror.org/02dyqfb80","country_code":"US","type":"company","lineage":["https://openalex.org/I93085520"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Daeyun Shim","raw_affiliation_strings":["Silicon Image, Sunnyvale, CA, USA"],"affiliations":[{"raw_affiliation_string":"Silicon Image, Sunnyvale, CA, USA","institution_ids":["https://openalex.org/I93085520"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100777100","display_name":"Chulwoo Kim","orcid":"https://orcid.org/0000-0003-4379-7905"},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Chulwoo Kim","raw_affiliation_strings":["Department of Electronics and Computer Engineering, Korea University, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Computer Engineering, Korea University, South Korea","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008010401","display_name":"Deog\u2010Kyoon Jeong","orcid":"https://orcid.org/0000-0003-0436-703X"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Deog-Kyoon Jeong","raw_affiliation_strings":["Department of Electrical Engineering, Seoul National University, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5066470707"],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":1.5898,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.85777743,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"46","issue":"11","first_page":"2560","last_page":"2570"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9918000102043152,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/vernier-scale","display_name":"Vernier scale","score":0.9578591585159302},{"id":"https://openalex.org/keywords/phase-shift-module","display_name":"Phase shift module","score":0.6690884828567505},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5451629757881165},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5109695196151733},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.4516264498233795},{"id":"https://openalex.org/keywords/dual-mode","display_name":"Dual mode","score":0.42707163095474243},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.4057616591453552},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38217073678970337},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.35687774419784546},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3302203416824341},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2814601957798004},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.2747725248336792},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.16061347723007202}],"concepts":[{"id":"https://openalex.org/C69710193","wikidata":"https://www.wikidata.org/wiki/Q14946576","display_name":"Vernier scale","level":2,"score":0.9578591585159302},{"id":"https://openalex.org/C103864889","wikidata":"https://www.wikidata.org/wiki/Q4480524","display_name":"Phase shift module","level":3,"score":0.6690884828567505},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5451629757881165},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5109695196151733},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.4516264498233795},{"id":"https://openalex.org/C3019325349","wikidata":"https://www.wikidata.org/wiki/Q3874753","display_name":"Dual mode","level":2,"score":0.42707163095474243},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.4057616591453552},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38217073678970337},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.35687774419784546},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3302203416824341},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2814601957798004},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.2747725248336792},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.16061347723007202},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jssc.2011.2164032","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2011.2164032","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},{"id":"pmh:oai:s-space.snu.ac.kr:10371/203221","is_oa":false,"landing_page_url":"https://hdl.handle.net/10371/203221","pdf_url":null,"source":{"id":"https://openalex.org/S4306401345","display_name":"Seoul National University Open Repository (Seoul National University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I139264467","host_organization_name":"Seoul National University","host_organization_lineage":["https://openalex.org/I139264467"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1544623790","https://openalex.org/W1548579702","https://openalex.org/W2009275112","https://openalex.org/W2025414300","https://openalex.org/W2059008798","https://openalex.org/W2086336002","https://openalex.org/W2101597431","https://openalex.org/W2115434507","https://openalex.org/W2124390946","https://openalex.org/W2125723211","https://openalex.org/W2130321486","https://openalex.org/W2130905581","https://openalex.org/W2132876868","https://openalex.org/W2136138043","https://openalex.org/W2142149196","https://openalex.org/W2142455831","https://openalex.org/W2145648782","https://openalex.org/W2148064048","https://openalex.org/W2162448355","https://openalex.org/W2164114298","https://openalex.org/W2536529234","https://openalex.org/W2562256660","https://openalex.org/W2565337129","https://openalex.org/W2567151605","https://openalex.org/W2954945477","https://openalex.org/W6656724780","https://openalex.org/W6678635708"],"related_works":["https://openalex.org/W2130767819","https://openalex.org/W2042788876","https://openalex.org/W2026327105","https://openalex.org/W2152797058","https://openalex.org/W2892778026","https://openalex.org/W2218086155","https://openalex.org/W2109859479","https://openalex.org/W1967574801","https://openalex.org/W2811476088","https://openalex.org/W2551612851"],"abstract_inverted_index":{"A":[0],"multi-port":[1],"serial":[2],"link":[3],"with":[4,31,51,56,87],"wide-range":[5],"CDR":[6,50,62],"using":[7],"digital":[8,41],"vernier":[9,19,44],"phase":[10,20,24,29,34,45],"shifting":[11],"and":[12,26,55,73,103,110],"dual-mode":[13,58],"control":[14],"is":[15],"presented.":[16],"The":[17],"proposed":[18,61],"shifter":[21,46],"generates":[22],"finely-spaced":[23],"steps":[25],"provides":[27],"unlimited":[28],"rotating":[30],"a":[32,75,96,118],"13.34-ps":[33],"step":[35],"at":[36,84,114],"5":[37,71,85,115],"Gbps.":[38],"By":[39],"inherently":[40],"nature,":[42],"the":[43,57,60,64,100,104],"enables":[47],"semi-digital":[48],"dual-loop":[49],"precise":[52],"tracking":[53],"performance,":[54],"control,":[59],"extends":[63],"operating":[65],"range":[66],"from":[67,117],"250":[68],"Mbps":[69],"to":[70],"Gbps":[72,86,116],"achieves":[74],"BER":[76],"of":[77],"less":[78],"than":[79],"10":[80],"<sup":[81,89],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[82,90],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-12</sup>":[83],"2":[88],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">9</sup>":[91],"-1":[92],"PRBS.":[93],"Fabricated":[94],"in":[95],"0.13-\u03bcm":[97],"CMOS":[98],"process,":[99],"main":[101],"PLL":[102],"single":[105],"receiver":[106],"dissipate":[107],"9.0":[108],"mW":[109,112],"19.2":[111],"respectively":[113],"1.2":[119],"V":[120],"supply.":[121]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}