{"id":"https://openalex.org/W2132010492","doi":"https://doi.org/10.1109/jssc.2011.2109434","title":"Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs","display_name":"Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs","publication_year":2011,"publication_date":"2011-03-15","ids":{"openalex":"https://openalex.org/W2132010492","doi":"https://doi.org/10.1109/jssc.2011.2109434","mag":"2132010492"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2011.2109434","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2011.2109434","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000123568","display_name":"Koichi Takeda","orcid":"https://orcid.org/0000-0001-7545-4101"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Koichi Takeda","raw_affiliation_strings":["LSI Research Laboratory, Renesas Electronics Corporation, Kawasaki, Kanagawa, Japan","LSI Res. Lab., Renesas Electron. Corp., Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Research Laboratory, Renesas Electronics Corporation, Kawasaki, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"LSI Res. Lab., Renesas Electron. Corp., Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055051416","display_name":"Toshio Saito","orcid":"https://orcid.org/0000-0002-0432-0402"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toshio Saito","raw_affiliation_strings":["Memory IP Development, Renesas Electronics Corporation, Kawasaki, Japan","Memory IP Dev. Dept., Renesas Electron., Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memory IP Development, Renesas Electronics Corporation, Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Memory IP Dev. Dept., Renesas Electron., Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071756083","display_name":"Shinobu Asayama","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shinobu Asayama","raw_affiliation_strings":["Memory IP Development, Renesas Electronics Corporation, Sagamihara, Japan","Memory IP Dev. Dept., Renesas Electron., Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memory IP Development, Renesas Electronics Corporation, Sagamihara, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Memory IP Dev. Dept., Renesas Electron., Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027023457","display_name":"Y. Aimoto","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yoshiharu Aimoto","raw_affiliation_strings":["Memory IP Development, Renesas Electronics Corporation, Kawasaki, Japan","Memory IP Dev. Dept., Renesas Electron., Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memory IP Development, Renesas Electronics Corporation, Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Memory IP Dev. Dept., Renesas Electron., Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027109998","display_name":"H. Kobatake","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroyuki Kobatake","raw_affiliation_strings":["Memory IP Development, Renesas Electronics Corporation, Kawasaki, Japan","Memory IP Dev. Dept., Renesas Electron., Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memory IP Development, Renesas Electronics Corporation, Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Memory IP Dev. Dept., Renesas Electron., Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108932076","display_name":"S. Ito","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shinya Ito","raw_affiliation_strings":["Embedded Memory Technology Department, Renesas Electronics Corporation, Sagamihara, Japan","Embedded Memory Technol. Dept., Renesas Electron., Sagamihara, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Embedded Memory Technology Department, Renesas Electronics Corporation, Sagamihara, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Embedded Memory Technol. Dept., Renesas Electron., Sagamihara, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009250405","display_name":"Toshifumi Takahashi","orcid":"https://orcid.org/0000-0003-0955-4248"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toshifumi Takahashi","raw_affiliation_strings":["Embedded Memory Technology Department, Renesas Electronics Corporation, Sagamihara, Japan","Embedded Memory Technol. Dept., Renesas Electron., Sagamihara, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Embedded Memory Technology Department, Renesas Electronics Corporation, Sagamihara, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Embedded Memory Technol. Dept., Renesas Electron., Sagamihara, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101431510","display_name":"Masahiro Nomura","orcid":"https://orcid.org/0000-0002-4945-5984"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiro Nomura","raw_affiliation_strings":["LSI Research Laboratory, Renesas Electronics Corporation, Kawasaki, Kanagawa, Japan","LSI Res. Lab., Renesas Electron. Corp., Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Research Laboratory, Renesas Electronics Corporation, Kawasaki, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"LSI Res. Lab., Renesas Electron. Corp., Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025035712","display_name":"Kiyoshi Takeuchi","orcid":"https://orcid.org/0000-0002-8392-1029"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kiyoshi Takeuchi","raw_affiliation_strings":["LSI Research Laboratory, Renesas Electronics Corporation, Sagamihara, Japan","LSI Res. Lab., Renesas Electron. Corp., Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Research Laboratory, Renesas Electronics Corporation, Sagamihara, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"LSI Res. Lab., Renesas Electron. Corp., Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084117432","display_name":"Y. Hayashi","orcid":"https://orcid.org/0000-0002-2060-1351"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yoshihiro Hayashi","raw_affiliation_strings":["LSI Research Laboratory, Renesas Electronics Corporation, Sagamihara, Japan","LSI Res. Lab., Renesas Electron. Corp., Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Research Laboratory, Renesas Electronics Corporation, Sagamihara, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"LSI Res. Lab., Renesas Electron. Corp., Kawasaki, Japan","institution_ids":["https://openalex.org/I4210153176"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.6218,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.85603473,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"46","issue":"4","first_page":"806","last_page":"814"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/notation","display_name":"Notation","score":0.5727115869522095},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4835967421531677},{"id":"https://openalex.org/keywords/word","display_name":"Word (group theory)","score":0.46685248613357544},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3378605544567108},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3298795819282532},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.23567122220993042}],"concepts":[{"id":"https://openalex.org/C45357846","wikidata":"https://www.wikidata.org/wiki/Q2001982","display_name":"Notation","level":2,"score":0.5727115869522095},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4835967421531677},{"id":"https://openalex.org/C90805587","wikidata":"https://www.wikidata.org/wiki/Q10944557","display_name":"Word (group theory)","level":2,"score":0.46685248613357544},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3378605544567108},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3298795819282532},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.23567122220993042},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2011.2109434","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2011.2109434","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1753784006","https://openalex.org/W1970601044","https://openalex.org/W1999777621","https://openalex.org/W2001044025","https://openalex.org/W2049520384","https://openalex.org/W2071159343","https://openalex.org/W2096890581","https://openalex.org/W2100483769","https://openalex.org/W2105358807","https://openalex.org/W2155462892","https://openalex.org/W2172203429","https://openalex.org/W2397682474","https://openalex.org/W3148792909","https://openalex.org/W3149884365"],"related_works":["https://openalex.org/W2360025963","https://openalex.org/W2370299677","https://openalex.org/W2360785147","https://openalex.org/W2353329674","https://openalex.org/W2389085708","https://openalex.org/W2382027973","https://openalex.org/W1575565059","https://openalex.org/W2368517087","https://openalex.org/W2361443205","https://openalex.org/W2379589241"],"abstract_inverted_index":{"A":[0,29],"multi-step":[1],"word-line":[2],"control":[3],"technology":[4],"(MWC),":[5],"combined":[6],"with":[7,25],"a":[8,47,112],"new":[9],"hierarchical":[10],"cell":[11],"SRAM":[12,45,101],"architecture":[13],"(HCA),":[14],"has":[15,51],"been":[16,52],"developed":[17],"to":[18,59],"overcome":[19],"rapid":[20],"increase":[21,115],"in":[22],"random":[23],"variability":[24],"no":[26],"area":[27],"penalty.":[28],"40-nm-node":[30],"0.248-":[31],"<formula":[32,38,62,71,77],"formulatype=\"inline\"":[33,39,63,72,78],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[34,40,64,73,79],"xmlns:xlink=\"http://www.w3.org/1999/xlink\"><tex":[35,65,74,80],"Notation=\"TeX\">$\\mu$</tex></formula>":[36],"m":[37],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[41],"<tex":[42],"Notation=\"TeX\">$^{2}$</tex></formula>":[43,66],"-cell":[44],"using":[46],"single":[48],"power":[49],"supply":[50],"successfully":[53],"fabricated,":[54],"pushing":[55],"up":[56],"bit":[57],"density":[58],"2.98":[60],"Mb/mm":[61],".":[67],"MWC":[68],"improved":[69],"VDD":[70],"Notation=\"TeX\">${\\_}$</tex></formula>":[75],"min@-6":[76],"Notation=\"TeX\">$\\sigma$</tex></formula>":[81],"by":[82,106,120],"0.34":[83],"V":[84,87,97],"and":[85,90],"0.22":[86],"for":[88],"read":[89],"write":[91],"operations,":[92],"respectively,":[93],"enabling":[94],"stable":[95],"1.0":[96],"operations.":[98],"Four":[99],"nanosecond":[100],"access":[102,117],"time":[103],"is":[104],"achieved":[105],"adopting":[107],"HCA,":[108],"which":[109],"cancels":[110],"out":[111],"1.4":[113],"ns":[114],"of":[116],"delay":[118],"caused":[119],"MWC.":[121]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}