{"id":"https://openalex.org/W2047956117","doi":"https://doi.org/10.1109/jssc.2010.2084490","title":"A 32 nm High-k Metal Gate SRAM With Adaptive Dynamic Stability Enhancement for Low-Voltage Operation","display_name":"A 32 nm High-k Metal Gate SRAM With Adaptive Dynamic Stability Enhancement for Low-Voltage Operation","publication_year":2010,"publication_date":"2010-11-10","ids":{"openalex":"https://openalex.org/W2047956117","doi":"https://doi.org/10.1109/jssc.2010.2084490","mag":"2047956117"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2010.2084490","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2010.2084490","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108470833","display_name":"Pramod Kolar","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Pramod Kolar","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053857493","display_name":"Eric Karl","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eric Karl","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103485789","display_name":"Uddalak Bhattacharya","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Uddalak Bhattacharya","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063387912","display_name":"Fatih Hamzaoglu","orcid":"https://orcid.org/0000-0003-3500-5007"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fatih Hamzaoglu","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108212302","display_name":"Henry Nho","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210131320","display_name":"LG (South Korea)","ror":"https://ror.org/03ddh2c27","country_code":"KR","type":"company","lineage":["https://openalex.org/I4210131320"]}],"countries":["KR","US"],"is_corresponding":false,"raw_author_name":"Henry Nho","raw_affiliation_strings":["LG Electronics Limited, Seoul, South Korea","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LG Electronics Limited, Seoul, South Korea","institution_ids":["https://openalex.org/I4210131320"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036589180","display_name":"Yong-Gee Ng","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yong-Gee Ng","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066037916","display_name":"Yih Wang","orcid":"https://orcid.org/0000-0002-4580-2870"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yih Wang","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":null,"display_name":"Kevin Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kevin Zhang","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5108470833"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":12.0639,"has_fulltext":false,"cited_by_count":76,"citation_normalized_percentile":{"value":0.98847758,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":"46","issue":"1","first_page":"76","last_page":"84"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.9672807455062866},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.7162280678749084},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5761076807975769},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.4749472439289093},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.46546223759651184},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4370424747467041},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.42915576696395874},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.42797166109085083},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.36267465353012085},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3596162497997284},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31268310546875}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.9672807455062866},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.7162280678749084},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5761076807975769},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.4749472439289093},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.46546223759651184},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4370424747467041},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.42915576696395874},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.42797166109085083},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.36267465353012085},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3596162497997284},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31268310546875},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2010.2084490","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2010.2084490","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6499999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1549072435","https://openalex.org/W1992606738","https://openalex.org/W2002044298","https://openalex.org/W2003644260","https://openalex.org/W2049520384","https://openalex.org/W2071159343","https://openalex.org/W2085486671","https://openalex.org/W2096035326","https://openalex.org/W2096046678","https://openalex.org/W2098678283","https://openalex.org/W2098688943","https://openalex.org/W2099231065","https://openalex.org/W2099911327","https://openalex.org/W2101255991","https://openalex.org/W2104196799","https://openalex.org/W2124748568","https://openalex.org/W2126898248","https://openalex.org/W2128748528","https://openalex.org/W2131833150","https://openalex.org/W2132357267","https://openalex.org/W2132621842","https://openalex.org/W2141041201","https://openalex.org/W2148393400","https://openalex.org/W2148694647","https://openalex.org/W2155524644","https://openalex.org/W2168101540","https://openalex.org/W2171922263","https://openalex.org/W2738467824","https://openalex.org/W2788433071","https://openalex.org/W3148792909","https://openalex.org/W6648341231","https://openalex.org/W6671882086","https://openalex.org/W6748134440"],"related_works":["https://openalex.org/W2119312496","https://openalex.org/W4247460323","https://openalex.org/W2537086382","https://openalex.org/W2107909712","https://openalex.org/W2153162275","https://openalex.org/W2079259690","https://openalex.org/W789543267","https://openalex.org/W2075972383","https://openalex.org/W2108986771","https://openalex.org/W2094295436"],"abstract_inverted_index":{"SRAM":[0,19,44,58,86,96,116],"bitcell":[1],"design":[2,40],"margin":[3],"continues":[4],"to":[5,8,68,105],"shrink":[6],"due":[7],"random":[9],"and":[10,17,27,34,46,107],"systematic":[11],"process":[12],"variation":[13],"in":[14,23,49,85],"scaled":[15,50],"technologies":[16],"conventional":[18,95],"faces":[20],"a":[21,65,113],"challenge":[22],"realizing":[24],"the":[25,71],"power":[26,45,108],"density":[28],"benefits":[29],"of":[30,73],"technology":[31],"scaling.":[32],"Smart":[33],"adaptive":[35],"assist":[36],"circuits":[37],"can":[38],"improve":[39],"margins":[41],"while":[42,88],"satisfying":[43],"performance":[47],"requirements":[48],"technologies.":[51],"This":[52],"paper":[53],"introduces":[54],"an":[55],"adaptive,":[56],"dynamic":[57],"word-line":[59],"under-drive":[60],"(ADWLUD)":[61],"scheme":[62],"that":[63],"uses":[64],"bitcell-based":[66],"sensor":[67,80,100],"dynamically":[69],"optimize":[70],"strength":[72],"WLUD":[74],"for":[75,112],"each":[76],"die.":[77],"The":[78,99],"ADWLUD":[79],"enables":[81],"130":[82],"mV":[83],"reduction":[84],"Vccmin":[87],"increasing":[89],"frequency":[90],"yield":[91],"by":[92],"9%":[93],"over":[94],"without":[97],"WLUD.":[98],"area":[101],"overhead":[102,109],"is":[103,110],"limited":[104],"0.02%":[106],"2%":[111],"3.4":[114],"Mb":[115],"array.":[117]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":8},{"year":2012,"cited_by_count":16}],"updated_date":"2026-05-05T08:41:31.759640","created_date":"2025-10-10T00:00:00"}
