{"id":"https://openalex.org/W2033887426","doi":"https://doi.org/10.1109/jssc.2010.2084470","title":"A 45 nm SOI Embedded DRAM Macro for the POWER\u2122 Processor 32 MByte On-Chip L3 Cache","display_name":"A 45 nm SOI Embedded DRAM Macro for the POWER\u2122 Processor 32 MByte On-Chip L3 Cache","publication_year":2010,"publication_date":"2010-11-30","ids":{"openalex":"https://openalex.org/W2033887426","doi":"https://doi.org/10.1109/jssc.2010.2084470","mag":"2033887426"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2010.2084470","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2010.2084470","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062553607","display_name":"J. Barth","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John Barth","raw_affiliation_strings":["IBM Systems and Technology Group, Burlington, VT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Burlington, VT, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042047144","display_name":"Kavita Nair","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kavita Nair","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042802099","display_name":"Nianzheng Cao","orcid":"https://orcid.org/0000-0003-2786-9139"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nianzheng Cao","raw_affiliation_strings":["IBM Research Division, Yorktown Heights, NY, USA","Research Division, IBM, Yorktown Heights, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research Division, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I1341412227"]},{"raw_affiliation_string":"Research Division, IBM, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111794645","display_name":"Don Plass","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Don Plass","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054340490","display_name":"Erik Nelson","orcid":"https://orcid.org/0000-0002-6080-0478"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Erik Nelson","raw_affiliation_strings":["IBM Systems and Technology Group, Burlington, VT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Burlington, VT, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033399476","display_name":"Charlie Hwang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Charlie Hwang","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112577160","display_name":"Gregory Fredeman","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Gregory Fredeman","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017755668","display_name":"Michael Sperling","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Michael Sperling","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085022216","display_name":"Abraham Mathews","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Abraham Mathews","raw_affiliation_strings":["IBM Systems and Technology Group, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079341609","display_name":"T. Kirihata","orcid":"https://orcid.org/0000-0002-3507-0274"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Toshiaki Kirihata","raw_affiliation_strings":["IBM Systems and Technology Group, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086942324","display_name":"W. Reohr","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"William R. Reohr","raw_affiliation_strings":["IBM Research Division, Yorktown Heights, NY, USA","Research Division, IBM, Yorktown Heights, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research Division, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I1341412227"]},{"raw_affiliation_string":"Research Division, IBM, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":11,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":6.7678,"has_fulltext":false,"cited_by_count":52,"citation_normalized_percentile":{"value":0.97010642,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"46","issue":"1","first_page":"64","last_page":"75"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6565221548080444},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6515780687332153},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5742198824882507},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5193544626235962},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49790239334106445},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4917626678943634},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.48690807819366455},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.47185561060905457},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.45495831966400146},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.4548708200454712},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4419829845428467},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.42968738079071045},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4263024628162384},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4217381179332733},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3768858015537262},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.32575178146362305},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.23536404967308044},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.10838282108306885}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6565221548080444},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6515780687332153},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5742198824882507},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5193544626235962},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49790239334106445},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4917626678943634},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.48690807819366455},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.47185561060905457},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.45495831966400146},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.4548708200454712},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4419829845428467},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.42968738079071045},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4263024628162384},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4217381179332733},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3768858015537262},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32575178146362305},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.23536404967308044},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.10838282108306885}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2010.2084470","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2010.2084470","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.75,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309102","display_name":"City University of New York","ror":"https://ror.org/00453a208"},{"id":"https://openalex.org/F4320337513","display_name":"Workforce Development for Teachers and Scientists","ror":"https://ror.org/05msy3529"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1483152377","https://openalex.org/W1501207292","https://openalex.org/W1980063930","https://openalex.org/W2000631360","https://openalex.org/W2038355886","https://openalex.org/W2042151827","https://openalex.org/W2097538613","https://openalex.org/W2098263385","https://openalex.org/W2104196799","https://openalex.org/W2156896601","https://openalex.org/W2159253302","https://openalex.org/W2172091399","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2154176871","https://openalex.org/W1835913819","https://openalex.org/W2740703383","https://openalex.org/W1607126780","https://openalex.org/W2051363901","https://openalex.org/W2127348582","https://openalex.org/W2373152541","https://openalex.org/W2900372418","https://openalex.org/W2097599071","https://openalex.org/W2174410816"],"abstract_inverted_index":{"A":[0],"1.35":[1],"ns":[2],"random":[3],"access":[4],"and":[5,116],"1.7":[6,104],"ns-random-cycle":[7],"SOI":[8],"embedded-DRAM":[9],"macro":[10,20],"has":[11],"been":[12],"developed":[13],"for":[14,37,133],"the":[15,34,71,77,86,103,122],"POWER7\u2122":[16,140],"high-performance":[17],"microprocessor.":[18,123],"The":[19,40,64,91],"employs":[21],"a":[22,44,56,127,137],"6":[23],"transistor":[24,95],"micro":[25],"sense-amplifier":[26],"architecture":[27],"with":[28,49,97,110],"extended":[29],"precharge":[30],"scheme":[31],"to":[32,80],"enhance":[33],"sensing":[35],"margin":[36,59],"product":[38],"quality.":[39],"detailed":[41],"study":[42],"shows":[43],"67%":[45],"bit-line":[46],"power":[47],"reduction":[48],"only":[50],"1.7%":[51],"area":[52],"overhead,":[53],"while":[54],"improving":[55],"read":[57],"zero":[58],"by":[60,70,102],"more":[61],"than":[62],"500ps.":[63],"array":[65],"voltage":[66,74,88,108,114],"window":[67],"is":[68,100],"improved":[69],"programmable":[72],"BL":[73],"generator,":[75],"allowing":[76],"embedded":[78],"DRAM":[79],"operate":[81],"reliably":[82],"without":[83],"constraining":[84],"of":[85],"microprocessor":[87],"supply":[89],"windows.":[90],"2.5nm":[92],"gate":[93],"oxide":[94],"cell":[96],"deep-trench":[98],"capacitor":[99],"accessed":[101],"V":[105,111],"wordline":[106],"high":[107],"(VPP)":[109],"WL":[112],"low":[113],"(VWL),":[115],"both":[117],"are":[118],"generated":[119],"internally":[120],"within":[121],"This":[124],"results":[125],"in":[126,136],"32":[128],"MB":[129],"on-chip":[130],"L3":[131],"on-chip-cache":[132],"8":[134],"cores":[135],"567":[138],"mm":[139],"die.":[141]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":11}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
