{"id":"https://openalex.org/W2117615344","doi":"https://doi.org/10.1109/jssc.2010.2053859","title":"A 6-$\\mu$W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology","display_name":"A 6-$\\mu$W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology","publication_year":2010,"publication_date":"2010-08-24","ids":{"openalex":"https://openalex.org/W2117615344","doi":"https://doi.org/10.1109/jssc.2010.2053859","mag":"2117615344"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2010.2053859","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2010.2053859","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054976374","display_name":"Jianping Guo","orcid":"https://orcid.org/0000-0002-0211-8606"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"HK","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Jianping Guo","raw_affiliation_strings":["Department of Electronic Engineering, Chinese University of Hong Kong, Sha Tin, Hong Kong, China","Dept of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Chinese University of Hong Kong, Sha Tin, Hong Kong, China","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Dept of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, China","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010016181","display_name":"Ka Nang Leung","orcid":"https://orcid.org/0000-0002-9921-3211"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"HK","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Ka Nang Leung","raw_affiliation_strings":["Department of Electronic Engineering, Chinese University of Hong Kong, Sha Tin, Hong Kong, China","Dept of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Chinese University of Hong Kong, Sha Tin, Hong Kong, China","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Dept of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, China","institution_ids":["https://openalex.org/I177725633"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177725633"],"apc_list":null,"apc_paid":null,"fwci":7.7325,"has_fulltext":false,"cited_by_count":336,"citation_normalized_percentile":{"value":0.98049807,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":99,"max":100},"biblio":{"volume":"45","issue":"9","first_page":"1896","last_page":"1905"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6938844919204712},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6068702936172485},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5549020171165466},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.5068328976631165},{"id":"https://openalex.org/keywords/low-dropout-regulator","display_name":"Low-dropout regulator","score":0.4807574450969696},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4663637578487396},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4392821788787842},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.41634953022003174},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3798857629299164},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3518674373626709},{"id":"https://openalex.org/keywords/voltage-regulator","display_name":"Voltage regulator","score":0.33084607124328613},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.32820868492126465},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30013883113861084},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.292763352394104},{"id":"https://openalex.org/keywords/dropout-voltage","display_name":"Dropout voltage","score":0.20793160796165466}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6938844919204712},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6068702936172485},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5549020171165466},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5068328976631165},{"id":"https://openalex.org/C140501009","wikidata":"https://www.wikidata.org/wiki/Q6692746","display_name":"Low-dropout regulator","level":5,"score":0.4807574450969696},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4663637578487396},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4392821788787842},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.41634953022003174},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3798857629299164},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3518674373626709},{"id":"https://openalex.org/C110706871","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Voltage regulator","level":3,"score":0.33084607124328613},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.32820868492126465},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30013883113861084},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.292763352394104},{"id":"https://openalex.org/C15032970","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Dropout voltage","level":4,"score":0.20793160796165466},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2010.2053859","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2010.2053859","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8500000238418579,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W86868570","https://openalex.org/W1580047797","https://openalex.org/W1974372886","https://openalex.org/W2023472772","https://openalex.org/W2034720635","https://openalex.org/W2054989520","https://openalex.org/W2078318212","https://openalex.org/W2100640194","https://openalex.org/W2102029541","https://openalex.org/W2105606575","https://openalex.org/W2118179090","https://openalex.org/W2125776391","https://openalex.org/W2131704971","https://openalex.org/W2138264002","https://openalex.org/W2138536318","https://openalex.org/W2167017502","https://openalex.org/W6634581756"],"related_works":["https://openalex.org/W2044172536","https://openalex.org/W3212531278","https://openalex.org/W1982997428","https://openalex.org/W2099626417","https://openalex.org/W2019514496","https://openalex.org/W3129126528","https://openalex.org/W2104805973","https://openalex.org/W2354552488","https://openalex.org/W4287514677","https://openalex.org/W3081405802"],"abstract_inverted_index":{"An":[0],"output-capacitorless":[1],"low-dropout":[2],"regulator":[3],"(LDO)":[4],"compensated":[5],"by":[6],"a":[7,14,69,137,146],"single":[8],"Miller":[9],"capacitor":[10,53],"is":[11,66,133,167],"implemented":[12],"in":[13,29],"commercial":[15],"90-nm":[16],"CMOS":[17],"technology.":[18],"The":[19,113,129,140],"proposed":[20,64],"LDO":[21,57,65],"makes":[22],"use":[23],"of":[24,50,88],"the":[25,48,56,63,92,124,164],"small":[26,40],"transistors":[27],"realized":[28],"nano-scale":[30],"technology":[31],"to":[32,74,99,103,109,122],"achieve":[33],"high":[34],"stability,":[35],"fast":[36],"transient":[37],"performance":[38],"and":[39,84,106,143,163],"voltage":[41],"spikes":[42],"under":[43,136,145],"rapid":[44],"load-current":[45],"changes":[46,158],"without":[47],"need":[49],"an":[51],"off-chip":[52],"connected":[54],"at":[55],"output.":[58],"Experimental":[59],"result":[60],"verifies":[61],"that":[62],"stable":[67],"for":[68,154],"capacitive":[70],"load":[71,82,86,107,156],"from":[72,81],"0":[73],"50":[75],"pF":[76],"(estimated":[77],"equivalent":[78],"parasitic":[79],"capacitance":[80],"circuits)":[83],"with":[85],"capability":[87],"100":[89],"mA.":[90],"Moreover,":[91],"gain-enhanced":[93],"structure":[94],"provides":[95],"sufficient":[96],"loop":[97],"gain":[98],"improve":[100],"line":[101],"regulation":[102,108],"3.78":[104],"mV/V":[105],"0.1":[110],"mV/mA,":[111],"respectively.":[112],"embedded":[114,125],"voltage-spike":[115],"detection":[116],"circuit":[117],"enables":[118],"pseudo":[119],"Class-AB":[120],"operation":[121],"drive":[123],"power":[126,131],"transistor":[127],"promptly.":[128],"measured":[130],"consumption":[132],"only":[134],"6$\\mu$W":[135],"0.75-V":[138],"supply.":[139],"maximum":[141],"overshoot":[142],"undershoot":[144],"1.2-V":[147],"supply":[148],"are":[149],"less":[150,168],"than":[151,169],"66":[152],"mV":[153],"full":[155],"current":[157],"within":[159],"100-ns":[160],"edge":[161],"time,":[162],"recovery":[165],"time":[166],"5$\\mu$s.":[170]},"counts_by_year":[{"year":2026,"cited_by_count":7},{"year":2025,"cited_by_count":19},{"year":2024,"cited_by_count":27},{"year":2023,"cited_by_count":32},{"year":2022,"cited_by_count":24},{"year":2021,"cited_by_count":18},{"year":2020,"cited_by_count":26},{"year":2019,"cited_by_count":19},{"year":2018,"cited_by_count":18},{"year":2017,"cited_by_count":23},{"year":2016,"cited_by_count":24},{"year":2015,"cited_by_count":24},{"year":2014,"cited_by_count":33},{"year":2013,"cited_by_count":10},{"year":2012,"cited_by_count":22}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}