{"id":"https://openalex.org/W2108435403","doi":"https://doi.org/10.1109/jssc.2010.2040306","title":"A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 $\\mu{\\hbox {m}}$ CMOS Technology","display_name":"A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 $\\mu{\\hbox {m}}$ CMOS Technology","publication_year":2010,"publication_date":"2010-03-24","ids":{"openalex":"https://openalex.org/W2108435403","doi":"https://doi.org/10.1109/jssc.2010.2040306","mag":"2108435403"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2010.2040306","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2010.2040306","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089977649","display_name":"Jianjun Yu","orcid":"https://orcid.org/0000-0002-2101-7018"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jianjun Yu","raw_affiliation_strings":["Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]},{"raw_affiliation_string":"Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035165376","display_name":"Fa Foster Dai","orcid":"https://orcid.org/0000-0003-1691-6649"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fa Foster Dai","raw_affiliation_strings":["Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]},{"raw_affiliation_string":"Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053942504","display_name":"R.C. Jaeger","orcid":"https://orcid.org/0000-0003-1555-8894"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Richard C. Jaeger","raw_affiliation_strings":["Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]},{"raw_affiliation_string":"Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5089977649"],"corresponding_institution_ids":["https://openalex.org/I82497590"],"apc_list":null,"apc_paid":null,"fwci":16.1639,"has_fulltext":false,"cited_by_count":207,"citation_normalized_percentile":{"value":0.99358661,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":100},"biblio":{"volume":"45","issue":"4","first_page":"830","last_page":"842"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/vernier-scale","display_name":"Vernier scale","score":0.9738073348999023},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.8710510730743408},{"id":"https://openalex.org/keywords/dpll-algorithm","display_name":"DPLL algorithm","score":0.8078998327255249},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7250651717185974},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.6055077314376831},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.5192759037017822},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.49129122495651245},{"id":"https://openalex.org/keywords/resolution","display_name":"Resolution (logic)","score":0.464387983083725},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4206651449203491},{"id":"https://openalex.org/keywords/ring","display_name":"Ring (chemistry)","score":0.4137968122959137},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.400222510099411},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.36065155267715454},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.34520938992500305},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.2670455574989319},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25028741359710693},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.14038318395614624},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.10368964076042175},{"id":"https://openalex.org/keywords/chemistry","display_name":"Chemistry","score":0.09561818838119507}],"concepts":[{"id":"https://openalex.org/C69710193","wikidata":"https://www.wikidata.org/wiki/Q14946576","display_name":"Vernier scale","level":2,"score":0.9738073348999023},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.8710510730743408},{"id":"https://openalex.org/C143936061","wikidata":"https://www.wikidata.org/wiki/Q2030088","display_name":"DPLL algorithm","level":4,"score":0.8078998327255249},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7250651717185974},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.6055077314376831},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.5192759037017822},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.49129122495651245},{"id":"https://openalex.org/C138268822","wikidata":"https://www.wikidata.org/wiki/Q1051925","display_name":"Resolution (logic)","level":2,"score":0.464387983083725},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4206651449203491},{"id":"https://openalex.org/C2780378348","wikidata":"https://www.wikidata.org/wiki/Q25351438","display_name":"Ring (chemistry)","level":2,"score":0.4137968122959137},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.400222510099411},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.36065155267715454},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.34520938992500305},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.2670455574989319},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25028741359710693},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.14038318395614624},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.10368964076042175},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.09561818838119507},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2010.2040306","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2010.2040306","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309904","display_name":"Auburn University","ror":"https://ror.org/02v80fc35"},{"id":"https://openalex.org/F4320337629","display_name":"Space and Missile Defense Command","ror":"https://ror.org/03agkn750"},{"id":"https://openalex.org/F4320338295","display_name":"Army Research Laboratory","ror":"https://ror.org/011hc8f90"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1578889014","https://openalex.org/W2016253482","https://openalex.org/W2062952706","https://openalex.org/W2097964046","https://openalex.org/W2108435403","https://openalex.org/W2111146745","https://openalex.org/W2117325338","https://openalex.org/W2117966934","https://openalex.org/W2130227819","https://openalex.org/W2152144298","https://openalex.org/W2152338756","https://openalex.org/W2153419022","https://openalex.org/W2159971659","https://openalex.org/W2160412553","https://openalex.org/W2166268103","https://openalex.org/W2177833654"],"related_works":["https://openalex.org/W2992346850","https://openalex.org/W2415980476","https://openalex.org/W2129773844","https://openalex.org/W2132016257","https://openalex.org/W2182982459","https://openalex.org/W2401428732","https://openalex.org/W2134403953","https://openalex.org/W2108435403","https://openalex.org/W2735892162","https://openalex.org/W4292874278"],"abstract_inverted_index":{"A":[0,64],"12-bit":[1],"Vernier":[2,20,25],"ring":[3,21,32],"time-to-digital":[4],"converter":[5],"(TDC)":[6],"with":[7,90,120],"time":[8,43,54],"resolution":[9],"of":[10,40,87,93,132],"8":[11],"ps":[12],"for":[13,37,77,111],"digital-phase-locked-loops":[14],"(DPLL)":[15],"is":[16,67,116],"presented.":[17],"This":[18],"novel":[19],"TDC":[22,47,81,114],"places":[23],"the":[24,38,41,112],"delay":[26],"cells":[27],"and":[28,34,59,73],"arbiters":[29],"in":[30,101],"a":[31,83,102,121,129],"format":[33],"reuses":[35],"them":[36],"measurement":[39],"input":[42],"interval.":[44],"The":[45,80,107],"proposed":[46],"thus":[48],"achieves":[49,82],"large":[50,84],"detectable":[51,85],"range,":[52],"fine":[53],"resolution,":[55],"small":[56],"die":[57],"size":[58],"low":[60],"power":[61,109,124],"consumption":[62,110],"simultaneously.":[63],"pre-logic":[65],"unit":[66],"developed":[68],"to":[69],"measure":[70],"both":[71],"positive":[72],"negative":[74],"phase":[75],"errors":[76],"DPLL":[78],"applications.":[79],"range":[86],"12":[88],"bits":[89],"core":[91],"area":[92],"0.75":[94],"\u00d7":[95],"0.35":[96],"mm":[97],"<sup":[98],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[99],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[100],"0.13":[103],"\u03bcm":[104],"CMOS":[105],"technology.":[106],"total":[108],"entire":[113],"chip":[115],"only":[117],"7.5":[118],"mW":[119],"1.5":[122],"V":[123],"supply,":[125],"while":[126],"operating":[127],"at":[128],"clock":[130],"frequency":[131],"15":[133],"MSPS.":[134]},"counts_by_year":[{"year":2025,"cited_by_count":13},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":17},{"year":2020,"cited_by_count":8},{"year":2019,"cited_by_count":10},{"year":2018,"cited_by_count":19},{"year":2017,"cited_by_count":15},{"year":2016,"cited_by_count":19},{"year":2015,"cited_by_count":20},{"year":2014,"cited_by_count":12},{"year":2013,"cited_by_count":15},{"year":2012,"cited_by_count":15}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
