{"id":"https://openalex.org/W2162586997","doi":"https://doi.org/10.1109/jssc.2008.2005813","title":"Low-Power Dynamic Memory Word Line Decoding for Static Random Access Memories","display_name":"Low-Power Dynamic Memory Word Line Decoding for Static Random Access Memories","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W2162586997","doi":"https://doi.org/10.1109/jssc.2008.2005813","mag":"2162586997"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2008.2005813","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2008.2005813","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072861402","display_name":"Giby Samson","orcid":"https://orcid.org/0000-0001-5227-516X"},"institutions":[{"id":"https://openalex.org/I4210137977","display_name":"Advanced Micro Devices (United States)","ror":"https://ror.org/04kd6c783","country_code":"US","type":"company","lineage":["https://openalex.org/I4210137977"]},{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Giby Samson","raw_affiliation_strings":["Advanced Micro Devices, Inc., Austin, TX, USA","Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc., Austin, TX, USA","institution_ids":["https://openalex.org/I4210137977"]},{"raw_affiliation_string":"Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054497435","display_name":"Nagaraj Ananthapadmanabhan","orcid":null},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]},{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nagaraj Ananthapadmanabhan","raw_affiliation_strings":["Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA","Texas Instruments, Inc., Tucson, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]},{"raw_affiliation_string":"Texas Instruments, Inc., Tucson, AZ, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069058976","display_name":"Sayeed A. Badrudduza","orcid":null},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sayeed A. Badrudduza","raw_affiliation_strings":["Arizona State University, Tempe, AZ, US"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Arizona State University, Tempe, AZ, US","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015329523","display_name":"Lawrence T. Clark","orcid":"https://orcid.org/0000-0001-7741-6512"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lawrence T. Clark","raw_affiliation_strings":["Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9055,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.791442,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"43","issue":"11","first_page":"2524","last_page":"2532"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6901195049285889},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6536769866943359},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.6245914101600647},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5902289748191833},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.527289628982544},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5131019353866577},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.489082396030426},{"id":"https://openalex.org/keywords/word","display_name":"Word (group theory)","score":0.4684460461139679},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.44623759388923645},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4344751238822937},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.4153374135494232},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34170693159103394},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3254204988479614},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.31676769256591797},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31194594502449036},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2878735661506653},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.25890398025512695},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.20314007997512817},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17473581433296204},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1523914635181427},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14730894565582275},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08312851190567017}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6901195049285889},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6536769866943359},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.6245914101600647},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5902289748191833},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.527289628982544},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5131019353866577},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.489082396030426},{"id":"https://openalex.org/C90805587","wikidata":"https://www.wikidata.org/wiki/Q10944557","display_name":"Word (group theory)","level":2,"score":0.4684460461139679},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.44623759388923645},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4344751238822937},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.4153374135494232},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34170693159103394},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3254204988479614},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.31676769256591797},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31194594502449036},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2878735661506653},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.25890398025512695},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.20314007997512817},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17473581433296204},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1523914635181427},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14730894565582275},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08312851190567017},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2008.2005813","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2008.2005813","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1518236483","https://openalex.org/W1581788205","https://openalex.org/W2050589795","https://openalex.org/W2075079194","https://openalex.org/W2088115909","https://openalex.org/W2099911327","https://openalex.org/W2100483769","https://openalex.org/W2103961614","https://openalex.org/W2118329107","https://openalex.org/W2131862714","https://openalex.org/W2138506171","https://openalex.org/W2148919256","https://openalex.org/W2162705472","https://openalex.org/W2164109024","https://openalex.org/W2165923347","https://openalex.org/W2169263481","https://openalex.org/W2171212820","https://openalex.org/W2177426130","https://openalex.org/W3142047130","https://openalex.org/W3145478948","https://openalex.org/W4211113724","https://openalex.org/W4230426441","https://openalex.org/W4232381701","https://openalex.org/W6634778591","https://openalex.org/W6684369935"],"related_works":["https://openalex.org/W3127857378","https://openalex.org/W2007098909","https://openalex.org/W2000366682","https://openalex.org/W4312057941","https://openalex.org/W2018547716","https://openalex.org/W3121230237","https://openalex.org/W2343597779","https://openalex.org/W2568381411","https://openalex.org/W2395653873","https://openalex.org/W2000557887"],"abstract_inverted_index":{"Conventional":[0],"memory":[1,48],"address":[2,102],"decoders":[3],"based":[4],"on":[5,91],"static":[6,66],"CMOS":[7,96],"gates":[8],"incur":[9],"high":[10],"clock":[11],"loading":[12],"and":[13,34,38,113],"unnecessary":[14],"power":[15,36],"dissipation":[16],"in":[17,82],"unselected":[18,83],"banks.":[19,84],"This":[20],"paper":[21],"presents":[22],"a":[23,46,64,92],"dynamic":[24,58,74,86],"word":[25,104],"line":[26,105],"decoder":[27,59,79,87],"which":[28],"is":[29,60,107,118],"fast,":[30],"has":[31,88],"reduced":[32],"active":[33],"leakage":[35,80,116],"dissipation,":[37],"also":[39],"enables":[40],"faster":[41],"race-free":[42],"sense":[43],"timing.":[44],"In":[45],"multi-bank":[47],"array":[49],"with":[50],"sixteen":[51],"decoders,":[52],"the":[53,57,71,114],"energy-delay":[54],"product":[55],"of":[56,73],"66%":[61],"lower":[62],"than":[63,122],"low-power":[65],"version.":[67],"The":[68,85,98],"design":[69],"leverages":[70],"predictability":[72],"circuits":[75],"to":[76,103],"provide":[77],"significant":[78],"reduction":[81,117],"been":[89],"fabricated":[90],"90":[93],"nm":[94],"bulk":[95],"process.":[97],"measured":[99,115],"test":[100],"chip":[101],"delay":[106],"170":[108],"ps":[109],"at":[110],"1.5":[111],"V":[112],"over":[119],"20x":[120],"atVDDgreater":[121],"0.8":[123],"V.":[124]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}
