{"id":"https://openalex.org/W2138778793","doi":"https://doi.org/10.1109/jssc.2006.885057","title":"Hierarchical Power Distribution With Power Tree in Dozens of Power Domains for 90-nm Low-Power Multi-CPU SoCs","display_name":"Hierarchical Power Distribution With Power Tree in Dozens of Power Domains for 90-nm Low-Power Multi-CPU SoCs","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2138778793","doi":"https://doi.org/10.1109/jssc.2006.885057","mag":"2138778793"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2006.885057","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2006.885057","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103122321","display_name":"Yusuke Kanno","orcid":"https://orcid.org/0000-0002-3023-353X"},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Yusuke Kanno","raw_affiliation_strings":["Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan","Central Research Lab., Hitachi Ltd., Tokyo"],"affiliations":[{"raw_affiliation_string":"Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"Central Research Lab., Hitachi Ltd., Tokyo","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009135764","display_name":"Hiroyuki Mizuno","orcid":"https://orcid.org/0000-0002-1213-9021"},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroyuki Mizuno","raw_affiliation_strings":["Strategy Center, Research and Development Group, Hitachi and Limited, Chiyoda, Tokyo, Japan","[Strategy Center, Research and Development Group, Hitachi and Limited, Chiyoda, Tokyo, Japan]"],"affiliations":[{"raw_affiliation_string":"Strategy Center, Research and Development Group, Hitachi and Limited, Chiyoda, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"[Strategy Center, Research and Development Group, Hitachi and Limited, Chiyoda, Tokyo, Japan]","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111672546","display_name":"Yoshihiko Yasu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]},{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Yoshihiko Yasu","raw_affiliation_strings":["Renesas Technology Corporation, Kodaira, Tokyo, Japan","Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Renesas Technology Corporation, Kodaira, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008295976","display_name":"Kei Hirose","orcid":"https://orcid.org/0000-0003-4366-7721"},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kenji Hirose","raw_affiliation_strings":["Strategy Center, Research and Development Group, Hitachi and Limited, Chiyoda, Tokyo, Japan","[Strategy Center, Research and Development Group, Hitachi and Limited, Chiyoda, Tokyo, Japan]"],"affiliations":[{"raw_affiliation_string":"Strategy Center, Research and Development Group, Hitachi and Limited, Chiyoda, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"[Strategy Center, Research and Development Group, Hitachi and Limited, Chiyoda, Tokyo, Japan]","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112047062","display_name":"Yasuhisa Shimazaki","orcid":null},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]},{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Yasuhisa Shimazaki","raw_affiliation_strings":["Renesas Technology Corporation, Kodaira, Tokyo, Japan","Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Renesas Technology Corporation, Kodaira, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113578692","display_name":"Tadashi Hoshi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]},{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Tadashi Hoshi","raw_affiliation_strings":["Renesas Technology Corporation, Kodaira, Tokyo, Japan","Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Renesas Technology Corporation, Kodaira, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030991849","display_name":"Yujiro Miyairi","orcid":null},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]},{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Yujiro Miyairi","raw_affiliation_strings":["Renesas Technology Corporation, Kodaira, Tokyo, Japan","Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Renesas Technology Corporation, Kodaira, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110338435","display_name":"T. Ishii","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]},{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Toshifumi Ishii","raw_affiliation_strings":["Renesas Technology Corporation, Kodaira, Tokyo, Japan","Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Renesas Technology Corporation, Kodaira, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032325862","display_name":"Tetsuya Yamada","orcid":"https://orcid.org/0000-0002-2125-7177"},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Tetsuya Yamada","raw_affiliation_strings":["Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan","[Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan]"],"affiliations":[{"raw_affiliation_string":"Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"[Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan]","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112263774","display_name":"Takahiro Irita","orcid":null},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]},{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Takahiro Irita","raw_affiliation_strings":["Renesas Technology Corporation, Kodaira, Tokyo, Japan","Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Renesas Technology Corporation, Kodaira, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013215924","display_name":"Toshihiro Hattori","orcid":"https://orcid.org/0000-0001-8763-1742"},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]},{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Toshihiro Hattori","raw_affiliation_strings":["Renesas Technology Corporation, Kodaira, Tokyo, Japan","Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Renesas Technology Corporation, Kodaira, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005193420","display_name":"Kazumasa Yanagisawa","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]},{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Kazumasa Yanagisawa","raw_affiliation_strings":["Renesas Technology Corporation, Kodaira, Tokyo, Japan","Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Renesas Technology Corporation, Kodaira, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]},{"raw_affiliation_string":"Renesas Technology Corp., Kodaira, Tokyo, Japan#TAB#","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007010754","display_name":"Naohiko Irie","orcid":null},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Naohiko Irie","raw_affiliation_strings":["Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan","[Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan]"],"affiliations":[{"raw_affiliation_string":"Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"[Central Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan]","institution_ids":["https://openalex.org/I65143321"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":13,"corresponding_author_ids":["https://openalex.org/A5103122321"],"corresponding_institution_ids":["https://openalex.org/I65143321"],"apc_list":null,"apc_paid":null,"fwci":6.6736,"has_fulltext":false,"cited_by_count":45,"citation_normalized_percentile":{"value":0.96955241,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"42","issue":"1","first_page":"74","last_page":"83"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-domains","display_name":"Power domains","score":0.8178012371063232},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.7889775633811951},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.6562055349349976},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.6268019080162048},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.551678478717804},{"id":"https://openalex.org/keywords/power-management","display_name":"Power management","score":0.5485301613807678},{"id":"https://openalex.org/keywords/power-budget","display_name":"Power budget","score":0.4753325283527374},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.45411136746406555},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.44118624925613403},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4186328649520874},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3850591778755188},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3356676697731018},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2705831825733185},{"id":"https://openalex.org/keywords/switched-mode-power-supply","display_name":"Switched-mode power supply","score":0.2592020034790039},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1998477578163147},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16749027371406555},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.12242740392684937},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10941347479820251},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10843765735626221},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07255515456199646},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.06353780627250671}],"concepts":[{"id":"https://openalex.org/C16021271","wikidata":"https://www.wikidata.org/wiki/Q17152552","display_name":"Power domains","level":3,"score":0.8178012371063232},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.7889775633811951},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.6562055349349976},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.6268019080162048},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.551678478717804},{"id":"https://openalex.org/C2778774385","wikidata":"https://www.wikidata.org/wiki/Q4437810","display_name":"Power management","level":3,"score":0.5485301613807678},{"id":"https://openalex.org/C149768029","wikidata":"https://www.wikidata.org/wiki/Q1509342","display_name":"Power budget","level":4,"score":0.4753325283527374},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.45411136746406555},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.44118624925613403},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4186328649520874},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3850591778755188},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3356676697731018},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2705831825733185},{"id":"https://openalex.org/C151799858","wikidata":"https://www.wikidata.org/wiki/Q587008","display_name":"Switched-mode power supply","level":3,"score":0.2592020034790039},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1998477578163147},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16749027371406555},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.12242740392684937},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10941347479820251},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10843765735626221},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07255515456199646},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.06353780627250671},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2006.885057","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2006.885057","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1503103436","https://openalex.org/W1520681036","https://openalex.org/W1527183359","https://openalex.org/W1549072435","https://openalex.org/W1595098459","https://openalex.org/W1602071261","https://openalex.org/W2025565772","https://openalex.org/W2033110462","https://openalex.org/W2098812192","https://openalex.org/W2103368706","https://openalex.org/W2114621701","https://openalex.org/W2116070420","https://openalex.org/W2123808925","https://openalex.org/W2140823559","https://openalex.org/W2156817051","https://openalex.org/W2171357178","https://openalex.org/W2364237620","https://openalex.org/W2414151390","https://openalex.org/W2461943447","https://openalex.org/W2738467824","https://openalex.org/W4244266552","https://openalex.org/W6718954112"],"related_works":["https://openalex.org/W2020434689","https://openalex.org/W2138778793","https://openalex.org/W1949070338","https://openalex.org/W1642255152","https://openalex.org/W2103368706","https://openalex.org/W2358819000","https://openalex.org/W2066983888","https://openalex.org/W39641061","https://openalex.org/W2147614189","https://openalex.org/W2463402347"],"abstract_inverted_index":{"Hierarchical":[0],"power":[1,5,26,31,36,41,58],"distribution":[2,32],"with":[3,17,38,68],"a":[4,14,23,34,47,54],"tree":[6],"has":[7],"been":[8],"developed.":[9],"The":[10,29],"key":[11],"features":[12],"are":[13],"power-tree":[15,19],"structure":[16],"three":[18],"management":[20],"rules":[21],"and":[22],"distributed":[24],"common":[25],"domain":[27,59],"implementation.":[28],"hierarchical":[30],"supports":[33],"fine-grained":[35,48],"gating":[37],"dozens":[39],"of":[40,53],"domains,":[42],"which":[43],"is":[44],"analogous":[45],"to":[46,63],"clock":[49],"gating.":[50],"Leakage":[51],"currents":[52],"1":[55],"000":[56],"000-gate":[57],"were":[60],"effectively":[61],"reduced":[62],"1/4000":[64],"in":[65],"multi-CPU":[66],"SoCs":[67],"minimal":[69],"area":[70],"overhead":[71]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":8}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}