{"id":"https://openalex.org/W1965174157","doi":"https://doi.org/10.1109/jssc.2006.870894","title":"A 1-MHZ Bandwidth 3.6-GHz 0.18- $muhbox m$ CMOS Fractional-N Synthesizer Utilizing a Hybrid PFD/DAC Structure for Reduced Broadband Phase Noise","display_name":"A 1-MHZ Bandwidth 3.6-GHz 0.18- $muhbox m$ CMOS Fractional-N Synthesizer Utilizing a Hybrid PFD/DAC Structure for Reduced Broadband Phase Noise","publication_year":2006,"publication_date":"2006-04-01","ids":{"openalex":"https://openalex.org/W1965174157","doi":"https://doi.org/10.1109/jssc.2006.870894","mag":"1965174157"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2006.870894","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2006.870894","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039303017","display_name":"Scott Meninger","orcid":"https://orcid.org/0000-0001-8680-9502"},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.E. Meninger","raw_affiliation_strings":["Massachusetts Institute of Technology, Cambridge, MA, USA","MIT, Cambridge MA, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"MIT, Cambridge MA, USA#TAB#","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054497844","display_name":"Michael H. Perrott","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M.H. Perrott","raw_affiliation_strings":["Massachusetts Institute of Technology, Cambridge, MA, USA","MIT, Cambridge MA, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"MIT, Cambridge MA, USA#TAB#","institution_ids":["https://openalex.org/I63966007"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I63966007"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":14.5932,"has_fulltext":false,"cited_by_count":124,"citation_normalized_percentile":{"value":0.99237528,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"41","issue":"4","first_page":"966","last_page":"980"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.8369125723838806},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.7486921548843384},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.7405378818511963},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.6475616693496704},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.6419683694839478},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5928261280059814},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5570762157440186},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.5029155611991882},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4876936376094818},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.461193323135376},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.4376922845840454},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4288032650947571},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4254138469696045},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.35784757137298584},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.16185423731803894}],"concepts":[{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.8369125723838806},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.7486921548843384},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.7405378818511963},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.6475616693496704},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.6419683694839478},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5928261280059814},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5570762157440186},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.5029155611991882},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4876936376094818},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.461193323135376},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.4376922845840454},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4288032650947571},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4254138469696045},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35784757137298584},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.16185423731803894}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2006.870894","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2006.870894","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6399999856948853,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1509148781","https://openalex.org/W1509581976","https://openalex.org/W1513090473","https://openalex.org/W1548598232","https://openalex.org/W1567307726","https://openalex.org/W2010437213","https://openalex.org/W2058996386","https://openalex.org/W2072192908","https://openalex.org/W2133676222","https://openalex.org/W2139625690","https://openalex.org/W2151769214","https://openalex.org/W2151833766","https://openalex.org/W2153369292","https://openalex.org/W2154076027","https://openalex.org/W2167284852","https://openalex.org/W2171035445","https://openalex.org/W2185555023","https://openalex.org/W2291681534","https://openalex.org/W2318911018"],"related_works":["https://openalex.org/W2166555237","https://openalex.org/W2622028395","https://openalex.org/W2161572852","https://openalex.org/W2371029054","https://openalex.org/W2370071821","https://openalex.org/W2394106628","https://openalex.org/W2350996794","https://openalex.org/W2384857702","https://openalex.org/W2367423162","https://openalex.org/W2144432296"],"abstract_inverted_index":{"A":[0],"frequency":[1],"synthesizer":[2,54,67,91],"architecture":[3],"capable":[4,104],"of":[5,37,105,115],"simultaneously":[6],"achieving":[7],"high":[8],"closed-loop":[9,70],"bandwidth":[10,71],"and":[11,28,72],"low":[12],"output":[13],"phase":[14,75,117],"noise":[15,59,76],"is":[16],"presented.":[17],"The":[18],"proposed":[19],"topology":[20],"uses":[21],"a":[22,44,65,81,96],"mismatch":[23],"compensated,":[24],"hybrid":[25],"phase/frequency":[26],"detector":[27],"digital-to-analog":[29],"converter":[30],"(PFD/DAC)":[31],"circuit":[32],"to":[33,43,92],"perform":[34],"active":[35],"cancellation":[36],"fractional-N":[38,66],"quantization":[39,58],"noise.":[40],"When":[41],"compared":[42],"classical":[45],"second-order":[46],"/spl":[47],"Sigma//spl":[48],"Delta/":[49],"synthesizer,":[50],"the":[51,90],"prototype":[52],"PFD/DAC":[53],"demonstrates":[55],">29":[56],"dB":[57],"suppression,":[60],"without":[61],"calibration,":[62],"resulting":[63],"in":[64],"with":[68,110],"1-MHz":[69],"-155":[73],"dBc/Hz":[74],"at":[77],"20-MHz":[78],"offset":[79],"for":[80],"3.6-GHz":[82],"output.":[83],"An":[84],"on-chip":[85],"band":[86],"select":[87],"divider":[88],"allows":[89],"be":[93],"configured":[94],"as":[95],"dual-band":[97],"(900":[98],"MHz/1.8":[99],"GHz)":[100],"direct":[101],"modulated":[102],"transmitter":[103],"transmitting":[106],"271-kb/s":[107],"GMSK":[108],"data":[109],"less":[111],"than":[112],"3":[113],"degrees":[114],"rms":[116],"error.":[118]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":7},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":6},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":9}],"updated_date":"2026-09-13T09:14:26.050021","created_date":"2025-10-10T00:00:00"}