{"id":"https://openalex.org/W1979576312","doi":"https://doi.org/10.1109/jssc.2005.845989","title":"A VCDL-based 60-760-MHz dual-loop DLL with infinite phase-shift capability and adaptive-bandwidth scheme","display_name":"A VCDL-based 60-760-MHz dual-loop DLL with infinite phase-shift capability and adaptive-bandwidth scheme","publication_year":2005,"publication_date":"2005-05-01","ids":{"openalex":"https://openalex.org/W1979576312","doi":"https://doi.org/10.1109/jssc.2005.845989","mag":"1979576312"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2005.845989","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2005.845989","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000533800","display_name":"Seung-Jun Bae","orcid":"https://orcid.org/0000-0003-0077-7488"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Seung-Jun Bae","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology, Gyeongbuk, South Korea","Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., Kyungbuk, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology, Gyeongbuk, South Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., Kyungbuk, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040932333","display_name":"Hyung\u2010Joon Chi","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyung-Joon Chi","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology, Gyeongbuk, South Korea","Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., Kyungbuk, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology, Gyeongbuk, South Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., Kyungbuk, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044163433","display_name":"Young\u2010Soo Sohn","orcid":"https://orcid.org/0000-0002-6068-0592"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Young-Soo Sohn","raw_affiliation_strings":["DRAM3, Samsung Electronics Company Limited, Hwasung, Gyeonggi, South Korea","[DRAM3, Samsung Electronics Company Limited, Hwasung, Gyeonggi, South Korea]"],"affiliations":[{"raw_affiliation_string":"DRAM3, Samsung Electronics Company Limited, Hwasung, Gyeonggi, South Korea","institution_ids":["https://openalex.org/I2250650973"]},{"raw_affiliation_string":"[DRAM3, Samsung Electronics Company Limited, Hwasung, Gyeonggi, South Korea]","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110769581","display_name":"H.-J. Park","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"H.-J. Park","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology, Gyeongbuk, South Korea","[Department of Electrical Engineering, Pohang University of Science and Technology, Gyeongbuk, South Korea]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology, Gyeongbuk, South Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"[Department of Electrical Engineering, Pohang University of Science and Technology, Gyeongbuk, South Korea]","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5000533800"],"corresponding_institution_ids":["https://openalex.org/I123900574"],"apc_list":null,"apc_paid":null,"fwci":2.1341,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.86811766,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"40","issue":"5","first_page":"1119","last_page":"1129"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9932000041007996,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9918000102043152,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8583084940910339},{"id":"https://openalex.org/keywords/dual-loop","display_name":"Dual loop","score":0.6609876751899719},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6218401193618774},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.596596360206604},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5704860687255859},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5559600591659546},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5322026610374451},{"id":"https://openalex.org/keywords/phase-detector","display_name":"Phase detector","score":0.5247975587844849},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.5123172998428345},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.4759514033794403},{"id":"https://openalex.org/keywords/phase-frequency-detector","display_name":"Phase frequency detector","score":0.46744808554649353},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4665980339050293},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.41841447353363037},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39741599559783936},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3752891719341278},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3102431893348694},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.2627485394477844},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.16031032800674438},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13568785786628723},{"id":"https://openalex.org/keywords/charge-pump","display_name":"Charge pump","score":0.12877154350280762},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10534313321113586},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.09712556004524231}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8583084940910339},{"id":"https://openalex.org/C2779691726","wikidata":"https://www.wikidata.org/wiki/Q5310214","display_name":"Dual loop","level":3,"score":0.6609876751899719},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6218401193618774},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.596596360206604},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5704860687255859},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5559600591659546},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5322026610374451},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.5247975587844849},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.5123172998428345},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.4759514033794403},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.46744808554649353},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4665980339050293},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.41841447353363037},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39741599559783936},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3752891719341278},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3102431893348694},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.2627485394477844},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.16031032800674438},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13568785786628723},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.12877154350280762},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10534313321113586},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.09712556004524231},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jssc.2005.845989","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2005.845989","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},{"id":"pmh:oai:oasis.postech.ac.kr:2014.oak/24619","is_oa":false,"landing_page_url":"https://oasis.postech.ac.kr/handle/2014.oak/24619","pdf_url":null,"source":{"id":"https://openalex.org/S4306401965","display_name":"Open Access System for Information Sharing (Pohang University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I123900574","host_organization_name":"Pohang University of Science and Technology","host_organization_lineage":["https://openalex.org/I123900574"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.800000011920929,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1580654973","https://openalex.org/W2001078510","https://openalex.org/W2002519749","https://openalex.org/W2009275112","https://openalex.org/W2023087202","https://openalex.org/W2039706313","https://openalex.org/W2059008798","https://openalex.org/W2114953806","https://openalex.org/W2124390946","https://openalex.org/W2136138043","https://openalex.org/W2142455831","https://openalex.org/W2150502087","https://openalex.org/W2162448355","https://openalex.org/W2175184221","https://openalex.org/W2587442922","https://openalex.org/W2788595513"],"related_works":["https://openalex.org/W4381745543","https://openalex.org/W2295601265","https://openalex.org/W2148370333","https://openalex.org/W4385624389","https://openalex.org/W2119216036","https://openalex.org/W3177439118","https://openalex.org/W2406632178","https://openalex.org/W1990401855","https://openalex.org/W2542557362","https://openalex.org/W2124954209"],"abstract_inverted_index":{"A":[0,33,62],"dual-loop":[1,76],"delay-locked":[2],"loop":[3],"(DLL)":[4],"was":[5,26,36,67],"implemented":[6],"by":[7,28,50,109],"using":[8,51,110],"an":[9,126],"analog":[10],"voltage-controlled":[11],"delay":[12,98],"line":[13],"(VCDL)":[14],"for":[15,38,99],"low":[16,34],"jitter.":[17],"An":[18],"infinite":[19],"phase-shift":[20],"capability":[21],"with":[22],"seamless":[23],"phase":[24,81,89],"change":[25],"achieved":[27,37,68],"adding":[29],"a":[30,111,117],"look-ahead":[31],"VCDL.":[32],"jitter":[35],"the":[39,52,71,75,79,84,92,95,106,145],"entire":[40],"input":[41],"frequency":[42],"lock":[43,65],"range":[44,66],"from":[45],"60":[46],"to":[47,70,101],"760":[48],"MHz":[49],"adaptive":[53],"bandwidth":[54],"scheme":[55],"in":[56],"both":[57],"reference":[58,85],"and":[59,78,136,141,148],"fine":[60],"loops.":[61],"wide":[63],"input-frequency":[64],"due":[69],"combined":[72],"effects":[73],"of":[74,83,120,130,139],"architecture":[77],"extra":[80,88],"detector":[82,90],"DLL.":[86],"The":[87],"eliminated":[91],"constraint":[93],"on":[94,105],"initial":[96],"VCDL":[97],"DLL":[100],"be":[102],"locked.":[103],"Measurements":[104],"fabricated":[107],"chip":[108,128],"0.18-/spl":[112],"mu/m":[113],"CMOS":[114],"process":[115],"showed":[116],"power":[118],"consumption":[119],"63":[121],"mW":[122],"at":[123,144],"700":[124],"MHz,":[125],"active":[127],"area":[129],"370/spl":[131],"times/510":[132],"/spl":[133],"mu/m/sup":[134],"2/,":[135],"peak-to-peak":[137],"jitters":[138],"28":[140],"39":[142],"ps":[143],"700-MHz":[146],"synchronous":[147],"plesiochronous":[149],"operations,":[150],"respectively.":[151]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}