{"id":"https://openalex.org/W2013498927","doi":"https://doi.org/10.1109/jssc.2002.1015692","title":"A high-performance and low-power 32-bit multiply-accumulate unit with single-instruction-multiple-data (SIMD) feature","display_name":"A high-performance and low-power 32-bit multiply-accumulate unit with single-instruction-multiple-data (SIMD) feature","publication_year":2002,"publication_date":"2002-07-01","ids":{"openalex":"https://openalex.org/W2013498927","doi":"https://doi.org/10.1109/jssc.2002.1015692","mag":"2013498927"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2002.1015692","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2002.1015692","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112523375","display_name":"Yuyun Liao","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Yuyun Liao","raw_affiliation_strings":["Intel Corporation, Chandler, AZ, USA","Intel Corp., Chandler, AZ USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corp., Chandler, AZ USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113515475","display_name":"D. Roberts","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.B. Roberts","raw_affiliation_strings":["Intel Corporation, Chandler, AZ, USA","Intel Corp., Chandler, AZ USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corp., Chandler, AZ USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5112523375"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":2.3761,"has_fulltext":false,"cited_by_count":45,"citation_normalized_percentile":{"value":0.8843712,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"37","issue":"7","first_page":"926","last_page":"931"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.8030204176902771},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7623811960220337},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.6607551574707031},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.5718536972999573},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5031530261039734},{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.48718351125717163},{"id":"https://openalex.org/keywords/32-bit","display_name":"32-bit","score":0.4552539587020874},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4376373887062073},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.42024195194244385},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4162874221801758},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38950276374816895},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.23445338010787964},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.19302064180374146},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.16342002153396606},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.11111217737197876},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0903325080871582},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.07528108358383179},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0725950300693512}],"concepts":[{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.8030204176902771},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7623811960220337},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.6607551574707031},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.5718536972999573},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5031530261039734},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.48718351125717163},{"id":"https://openalex.org/C75695347","wikidata":"https://www.wikidata.org/wiki/Q225147","display_name":"32-bit","level":2,"score":0.4552539587020874},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4376373887062073},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.42024195194244385},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4162874221801758},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38950276374816895},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.23445338010787964},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.19302064180374146},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.16342002153396606},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.11111217737197876},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0903325080871582},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.07528108358383179},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0725950300693512},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2002.1015692","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2002.1015692","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6100000143051147}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310164","display_name":"Texas A and M University","ror":"https://ror.org/01f5ytq51"},{"id":"https://openalex.org/F4320310586","display_name":"University of Louisiana at Lafayette","ror":"https://ror.org/01x8rc503"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1983849809","https://openalex.org/W1994777880","https://openalex.org/W2000260960","https://openalex.org/W2039675687","https://openalex.org/W2113002954","https://openalex.org/W2135955108","https://openalex.org/W2156566689","https://openalex.org/W2169263481"],"related_works":["https://openalex.org/W4254551318","https://openalex.org/W975020229","https://openalex.org/W1902169700","https://openalex.org/W4241265697","https://openalex.org/W4211092986","https://openalex.org/W2011273053","https://openalex.org/W2295312786","https://openalex.org/W3079574035","https://openalex.org/W2502671172","https://openalex.org/W2472892553"],"abstract_inverted_index":{"A":[0,84],"high-performance":[1],"and":[2,56,77,90,101],"low-power":[3,102],"32-bit":[4,57],"multiply-accumulate":[5],"unit":[6],"(MAC)":[7],"is":[8],"described":[9],"in":[10,19,110],"this":[11,46,111],"paper.":[12],"The":[13],"last":[14],"mixed-length":[15],"encoding":[16,28,43,48],"scheme":[17,29],"used":[18,96],"the":[20,23,35,74,78,99],"MAC":[21,60],"leverages":[22],"advantage":[24],"of":[25,40,86],"a":[26,41],"16-bit":[27,53],"without":[30],"adding":[31],"extra":[32],"delay":[33],"to":[34,97],"faster":[36],"four-stage":[37],"Wallace":[38],"tree":[39],"12-bit":[42],"scheme.":[44],"With":[45],"new":[47],"scheme,":[49],"one-cycle":[50],"throughput":[51],"for":[52],"/spl":[54,58],"times/16-bit":[55,59],"instructions":[61],"was":[62,95],"achieved":[63],"at":[64],"very":[65],"high":[66],"frequencies.":[67],"To":[68],"handle":[69],"media":[70],"streams":[71],"more":[72],"efficiently,":[73],"single-instruction-multiple-data":[75],"(SIMD)":[76],"multiply-with-implicit-accumulate":[79],"(MIA)":[80],"features":[81],"were":[82,107],"added.":[83],"mixture":[85],"static":[87],"CMOS":[88],"logic":[89,93],"complementary":[91],"pass-gate":[92],"(CPL)":[94],"achieve":[98],"high-speed":[100],"goals.":[103],"Several":[104],"power-saving":[105],"techniques":[106],"also":[108],"implemented":[109],"MAC.":[112]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
