{"id":"https://openalex.org/W2135033346","doi":"https://doi.org/10.1109/jsac.1986.1146293","title":"Design Examples of System Partitioning and Performance Allocation for VLSI Implementation","display_name":"Design Examples of System Partitioning and Performance Allocation for VLSI Implementation","publication_year":1986,"publication_date":"1986-01-01","ids":{"openalex":"https://openalex.org/W2135033346","doi":"https://doi.org/10.1109/jsac.1986.1146293","mag":"2135033346"},"language":"en","primary_location":{"id":"doi:10.1109/jsac.1986.1146293","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jsac.1986.1146293","pdf_url":null,"source":{"id":"https://openalex.org/S90422530","display_name":"IEEE Journal on Selected Areas in Communications","issn_l":"0733-8716","issn":["0733-8716","1558-0008"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Selected Areas in Communications","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039416290","display_name":"B. Agrawal","orcid":null},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"B. Agrawal","raw_affiliation_strings":["M/A-COM DCC, Inc., Germantown, MD, USA","M/A-COM DCC, Germantown, MD, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"M/A-COM DCC, Inc., Germantown, MD, USA","institution_ids":["https://openalex.org/I1328728281"]},{"raw_affiliation_string":"M/A-COM DCC, Germantown, MD, USA#TAB#","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012502866","display_name":"N. Janakiraman","orcid":"https://orcid.org/0000-0001-6616-5340"},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N. Janakiraman","raw_affiliation_strings":["M/A-COM DCC, Inc., Germantown, MD, USA","[M/A-COM DCC, Inc., Germantown, MD, USA]"],"affiliations":[{"raw_affiliation_string":"M/A-COM DCC, Inc., Germantown, MD, USA","institution_ids":["https://openalex.org/I1328728281"]},{"raw_affiliation_string":"[M/A-COM DCC, Inc., Germantown, MD, USA]","institution_ids":["https://openalex.org/I1328728281"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5039416290"],"corresponding_institution_ids":["https://openalex.org/I1328728281"],"apc_list":null,"apc_paid":null,"fwci":0.4511,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.71656577,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":"1","first_page":"4","last_page":"14"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9890000224113464,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9861999750137329,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.927047610282898},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7951760292053223},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.601684033870697},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.522312343120575},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4887568950653076},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.47158873081207275},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47035980224609375},{"id":"https://openalex.org/keywords/systems-design","display_name":"Systems design","score":0.45619234442710876},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42719951272010803},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4259626865386963},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.4255266785621643},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4021570682525635},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17789173126220703},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17435353994369507},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09684708714485168}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.927047610282898},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7951760292053223},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.601684033870697},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.522312343120575},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4887568950653076},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.47158873081207275},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47035980224609375},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.45619234442710876},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42719951272010803},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4259626865386963},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.4255266785621643},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4021570682525635},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17789173126220703},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17435353994369507},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09684708714485168},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jsac.1986.1146293","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jsac.1986.1146293","pdf_url":null,"source":{"id":"https://openalex.org/S90422530","display_name":"IEEE Journal on Selected Areas in Communications","issn_l":"0733-8716","issn":["0733-8716","1558-0008"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Selected Areas in Communications","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6399999856948853,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1627001377","https://openalex.org/W1967575124","https://openalex.org/W2013286010","https://openalex.org/W2025557509","https://openalex.org/W2041456134","https://openalex.org/W2046261796","https://openalex.org/W2064699455","https://openalex.org/W2138796022","https://openalex.org/W2584507070","https://openalex.org/W4234012966"],"related_works":["https://openalex.org/W1553422968","https://openalex.org/W4389672975","https://openalex.org/W2078506771","https://openalex.org/W2007385019","https://openalex.org/W1955236059","https://openalex.org/W2036121598","https://openalex.org/W1965232212","https://openalex.org/W1987513258","https://openalex.org/W2109207559","https://openalex.org/W1974416117"],"abstract_inverted_index":{"Generally,":[0],"in":[1],"the":[2,45,64,71,80,124],"telecommunication":[3],"industry,":[4],"VLSI":[5,48,75,100],"implementation":[6,101],"is":[7,16,37],"viewed":[8],"as":[9,51,70],"a":[10,22,127],"means":[11],"to":[12,27,39,43,87,120,126],"cost":[13],"reduction":[14],"and":[15,42,54,63,102,108,123],"attempted":[17],"only":[18],"after":[19],"successively":[20],"decomposing":[21],"system":[23,89,96,106],"into":[24],"circuits":[25],"corresponding":[26],"individual":[28],"printed":[29],"circuit":[30,85],"boards":[31],"(PCB's).":[32],"This":[33],"traditional":[34],"\"circuit-design\"":[35],"approach":[36],"unable":[38],"cope":[40],"with":[41],"exploit":[44],"potential":[46],"of":[47,59,66],"capabilities":[49],"such":[50],"chip":[52,76],"density":[53],"processing":[55,61],"power.":[56],"The":[57],"availability":[58],"unprecedented":[60],"power":[62],"recognition":[65],"\"effective":[67],"endproduct":[68],"cost\"":[69],"true":[72],"measure":[73],"for":[74,99],"fabrication":[77],"are":[78,112],"leading":[79],"change":[81],"over":[82],"from":[83],"integrated":[84,88],"design":[86,97,116,122],"design.":[90,129],"In":[91],"this":[92,94],"paper,":[93],"emerging":[95],"methodology":[98],"its":[103],"two":[104,115],"elements,":[105],"partitioning":[107],"performance":[109],"specification":[110],"allocation,":[111],"illustrated":[113],"by":[114],"examples;":[117],"one":[118],"relating":[119],"line-circuit":[121],"other":[125],"packet-switch":[128]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}