{"id":"https://openalex.org/W1518772125","doi":"https://doi.org/10.1109/jproc.2015.2435018","title":"Evolution of Memory Architecture","display_name":"Evolution of Memory Architecture","publication_year":2015,"publication_date":"2015-07-07","ids":{"openalex":"https://openalex.org/W1518772125","doi":"https://doi.org/10.1109/jproc.2015.2435018","mag":"1518772125"},"language":"en","primary_location":{"id":"doi:10.1109/jproc.2015.2435018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jproc.2015.2435018","pdf_url":null,"source":{"id":"https://openalex.org/S68686220","display_name":"Proceedings of the IEEE","issn_l":"0018-9219","issn":["0018-9219","1558-2256"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109898812","display_name":"Ravi Nair","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ravi Nair","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","[IBM Thomas J. Watson Research Center, Yorktown Heights, NY , USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"[IBM Thomas J. Watson Research Center, Yorktown Heights, NY , USA]","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5109898812"],"corresponding_institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":4.312,"has_fulltext":false,"cited_by_count":61,"citation_normalized_percentile":{"value":0.94245192,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"103","issue":"8","first_page":"1331","last_page":"1345"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8219785094261169},{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.7358719110488892},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.6040123701095581},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.5903786420822144},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5403440594673157},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5164539813995361},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.4932860732078552},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.47462308406829834},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.47407689690589905},{"id":"https://openalex.org/keywords/dataflow-architecture","display_name":"Dataflow architecture","score":0.4427781403064728},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.4291676878929138},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4271208643913269},{"id":"https://openalex.org/keywords/database-centric-architecture","display_name":"Database-centric architecture","score":0.42700842022895813},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.32679659128189087},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.24889987707138062},{"id":"https://openalex.org/keywords/reference-architecture","display_name":"Reference architecture","score":0.20988216996192932},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18059879541397095},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.1332593858242035},{"id":"https://openalex.org/keywords/software-architecture","display_name":"Software architecture","score":0.10396835207939148},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.08991044759750366}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8219785094261169},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.7358719110488892},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.6040123701095581},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.5903786420822144},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5403440594673157},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5164539813995361},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.4932860732078552},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.47462308406829834},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.47407689690589905},{"id":"https://openalex.org/C176727019","wikidata":"https://www.wikidata.org/wiki/Q1172415","display_name":"Dataflow architecture","level":3,"score":0.4427781403064728},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.4291676878929138},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4271208643913269},{"id":"https://openalex.org/C154240960","wikidata":"https://www.wikidata.org/wiki/Q2860294","display_name":"Database-centric architecture","level":5,"score":0.42700842022895813},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.32679659128189087},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.24889987707138062},{"id":"https://openalex.org/C55356503","wikidata":"https://www.wikidata.org/wiki/Q2136675","display_name":"Reference architecture","level":4,"score":0.20988216996192932},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18059879541397095},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.1332593858242035},{"id":"https://openalex.org/C35869016","wikidata":"https://www.wikidata.org/wiki/Q846636","display_name":"Software architecture","level":3,"score":0.10396835207939148},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.08991044759750366},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jproc.2015.2435018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jproc.2015.2435018","pdf_url":null,"source":{"id":"https://openalex.org/S68686220","display_name":"Proceedings of the IEEE","issn_l":"0018-9219","issn":["0018-9219","1558-2256"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":66,"referenced_works":["https://openalex.org/W1042992399","https://openalex.org/W1510543252","https://openalex.org/W1564523715","https://openalex.org/W1593402818","https://openalex.org/W1734799737","https://openalex.org/W1850405760","https://openalex.org/W1964517503","https://openalex.org/W1967034130","https://openalex.org/W1975237352","https://openalex.org/W1983096721","https://openalex.org/W1995592915","https://openalex.org/W1996031850","https://openalex.org/W2009832491","https://openalex.org/W2010042648","https://openalex.org/W2028133900","https://openalex.org/W2030877481","https://openalex.org/W2033982707","https://openalex.org/W2035486547","https://openalex.org/W2039560919","https://openalex.org/W2044566332","https://openalex.org/W2048466306","https://openalex.org/W2048588974","https://openalex.org/W2056052206","https://openalex.org/W2059807497","https://openalex.org/W2062143991","https://openalex.org/W2062949766","https://openalex.org/W2069756028","https://openalex.org/W2076257979","https://openalex.org/W2090132317","https://openalex.org/W2092324191","https://openalex.org/W2093524602","https://openalex.org/W2094332102","https://openalex.org/W2095135670","https://openalex.org/W2097215759","https://openalex.org/W2097538613","https://openalex.org/W2097797648","https://openalex.org/W2099316199","https://openalex.org/W2109824347","https://openalex.org/W2112547256","https://openalex.org/W2114853176","https://openalex.org/W2116784058","https://openalex.org/W2117489143","https://openalex.org/W2122060420","https://openalex.org/W2124632665","https://openalex.org/W2132729131","https://openalex.org/W2133394135","https://openalex.org/W2137380783","https://openalex.org/W2138913040","https://openalex.org/W2144518192","https://openalex.org/W2187230075","https://openalex.org/W2293221651","https://openalex.org/W2295862081","https://openalex.org/W2396727930","https://openalex.org/W2468067288","https://openalex.org/W2499905000","https://openalex.org/W2543205889","https://openalex.org/W2999097477","https://openalex.org/W3113167932","https://openalex.org/W3159585669","https://openalex.org/W4237211384","https://openalex.org/W4246838776","https://openalex.org/W4250981202","https://openalex.org/W4285719527","https://openalex.org/W4292169167","https://openalex.org/W6633941944","https://openalex.org/W6637631891"],"related_works":["https://openalex.org/W408776879","https://openalex.org/W2078720616","https://openalex.org/W2144798271","https://openalex.org/W318748086","https://openalex.org/W2011070474","https://openalex.org/W2115955035","https://openalex.org/W1974211070","https://openalex.org/W2058911850","https://openalex.org/W1998129367","https://openalex.org/W2123848640"],"abstract_inverted_index":{"Computer":[0],"memories":[1],"continue":[2],"to":[3,67,83,93,148,154,188],"serve":[4],"the":[5,12,51,132,144,149,152,159,170,178,197],"role":[6],"that":[7,26,124,177],"they":[8],"first":[9],"served":[10],"in":[11,34,54,127,158],"electronic":[13],"discrete":[14],"variable":[15],"automatic":[16],"computer":[17],"(EDVAC)":[18],"machine":[19],"documented":[20],"by":[21],"John":[22],"von":[23,200],"Neumann,":[24],"namely":[25],"of":[27,57,74,101,107,120,134,143,151,161,172,180],"supplying":[28],"instructions":[29],"and":[30,45,80,96,117,138,175,183,192],"operands":[31],"for":[32,87,98],"calculations":[33],"a":[35,135,166],"timely":[36],"manner.":[37],"As":[38],"technology":[39],"has":[40,60],"made":[41],"possible":[42],"significantly":[43],"larger":[44],"faster":[46],"machines":[47],"with":[48,76],"multiple":[49],"processors,":[50],"relative":[52],"distance":[53],"processor":[55,191],"cycles":[56],"this":[58,69,85],"memory":[59,70,128,173],"increased":[61],"considerably.":[62],"Microarchitectural":[63],"techniques":[64],"have":[65,81],"evolved":[66],"share":[68],"across":[71,115],"ever-larger":[72],"systems":[73,113],"processors":[75],"deep":[77],"cache":[78],"hierarchies":[79],"managed":[82],"hide":[84],"latency":[86],"many":[88],"applications,":[89],"but":[90],"are":[91,186],"proving":[92],"be":[94],"expensive":[95],"energy-inefficient":[97],"newer":[99],"types":[100],"problems":[102,182],"working":[103],"on":[104,169],"massive":[105],"amounts":[106],"data.":[108,162],"New":[109],"paradigms":[110],"include":[111],"scale-out":[112],"distributed":[114],"hundreds":[116],"even":[118],"thousands":[119],"nodes,":[121],"in-memory":[122],"databases":[123],"keep":[125],"data":[126,153],"much":[129],"longer":[130],"than":[131],"duration":[133],"single":[136],"task,":[137],"near-data":[139],"computation,":[140],"where":[141],"some":[142],"computation":[145],"is":[146],"off-loaded":[147],"location":[150],"avoid":[155],"wasting":[156],"energy":[157],"movement":[160],"This":[163],"paper":[164],"provides":[165],"historical":[167],"perspective":[168],"evolution":[171],"architecture,":[174],"suggests":[176],"requirements":[179],"new":[181,184],"applications":[185],"likely":[187],"fundamentally":[189],"change":[190],"system":[193],"architecture":[194],"away":[195],"from":[196],"currently":[198],"established":[199],"Neumann":[201],"model.":[202]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":10},{"year":2022,"cited_by_count":9},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":8},{"year":2019,"cited_by_count":7},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":3}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
