{"id":"https://openalex.org/W2047569150","doi":"https://doi.org/10.1109/jproc.2008.2007472","title":"Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks","display_name":"Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W2047569150","doi":"https://doi.org/10.1109/jproc.2008.2007472","mag":"2047569150"},"language":"en","primary_location":{"id":"doi:10.1109/jproc.2008.2007472","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jproc.2008.2007472","pdf_url":null,"source":{"id":"https://openalex.org/S68686220","display_name":"Proceedings of the IEEE","issn_l":"0018-9219","issn":["0018-9219","1558-2256"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103342202","display_name":"Philip Jacob","orcid":null},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Philip Jacob","raw_affiliation_strings":["Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]},{"raw_affiliation_string":"Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#","institution_ids":["https://openalex.org/I165799507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048717783","display_name":"Aamir Zia","orcid":null},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aamir Zia","raw_affiliation_strings":["Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]},{"raw_affiliation_string":"Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#","institution_ids":["https://openalex.org/I165799507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049647322","display_name":"Okan Erdogan","orcid":null},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Okan Erdogan","raw_affiliation_strings":["Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]},{"raw_affiliation_string":"Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#","institution_ids":["https://openalex.org/I165799507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006889674","display_name":"Paul M. Belemjian","orcid":null},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paul M. Belemjian","raw_affiliation_strings":["Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]},{"raw_affiliation_string":"Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#","institution_ids":["https://openalex.org/I165799507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100434618","display_name":"Jinwoo Kim","orcid":"https://orcid.org/0000-0003-4380-6656"},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jin-Woo Kim","raw_affiliation_strings":["Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]},{"raw_affiliation_string":"Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#","institution_ids":["https://openalex.org/I165799507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109897442","display_name":"Michael Chu","orcid":null},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Chu","raw_affiliation_strings":["Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]},{"raw_affiliation_string":"Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#","institution_ids":["https://openalex.org/I165799507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113702863","display_name":"Russell P. Kraft","orcid":null},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Russell P. Kraft","raw_affiliation_strings":["Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]},{"raw_affiliation_string":"Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#","institution_ids":["https://openalex.org/I165799507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038903084","display_name":"J. F. McDonald","orcid":"https://orcid.org/0000-0003-1058-6845"},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John F. McDonald","raw_affiliation_strings":["Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"Center of Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]},{"raw_affiliation_string":"Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY#TAB#","institution_ids":["https://openalex.org/I165799507"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110320548","display_name":"Kerry Bernstein","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kerry Bernstein","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Hawthorne, NY, USA","IBM -- T. J. Watson Research Center, Yorktown Heights, NY"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Hawthorne, NY, USA","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM -- T. J. Watson Research Center, Yorktown Heights, NY","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5103342202"],"corresponding_institution_ids":["https://openalex.org/I165799507"],"apc_list":null,"apc_paid":null,"fwci":6.2806,"has_fulltext":false,"cited_by_count":59,"citation_normalized_percentile":{"value":0.96721504,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"97","issue":"1","first_page":"108","last_page":"122"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6827297210693359},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.541102409362793},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.5013949871063232},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4735628366470337},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4702039361000061},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4574401378631592},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.454863041639328},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.43277984857559204},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.41643041372299194},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.41490787267684937},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38177743554115295},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.35490041971206665},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.24886900186538696}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6827297210693359},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.541102409362793},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.5013949871063232},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4735628366470337},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4702039361000061},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4574401378631592},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.454863041639328},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.43277984857559204},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.41643041372299194},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.41490787267684937},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38177743554115295},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.35490041971206665},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.24886900186538696},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jproc.2008.2007472","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jproc.2008.2007472","pdf_url":null,"source":{"id":"https://openalex.org/S68686220","display_name":"Proceedings of the IEEE","issn_l":"0018-9219","issn":["0018-9219","1558-2256"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7300000190734863,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W1575732703","https://openalex.org/W1662304383","https://openalex.org/W1980257390","https://openalex.org/W1983096721","https://openalex.org/W1987131925","https://openalex.org/W2019287953","https://openalex.org/W2022740893","https://openalex.org/W2023264348","https://openalex.org/W2028954821","https://openalex.org/W2042151827","https://openalex.org/W2056254100","https://openalex.org/W2097362469","https://openalex.org/W2103184543","https://openalex.org/W2104225326","https://openalex.org/W2110444864","https://openalex.org/W2116556879","https://openalex.org/W2117816012","https://openalex.org/W2122636510","https://openalex.org/W2126716774","https://openalex.org/W2128699986","https://openalex.org/W2130517400","https://openalex.org/W2132668926","https://openalex.org/W2137893918","https://openalex.org/W2139730616","https://openalex.org/W2141736089","https://openalex.org/W2143807959","https://openalex.org/W2145135695","https://openalex.org/W2146306637","https://openalex.org/W2150073849","https://openalex.org/W2150871235","https://openalex.org/W2152706327","https://openalex.org/W2158540919","https://openalex.org/W2588454598","https://openalex.org/W3151327929","https://openalex.org/W4235834116","https://openalex.org/W4254318917","https://openalex.org/W4292169167","https://openalex.org/W6680835552","https://openalex.org/W6682452906","https://openalex.org/W6733039060"],"related_works":["https://openalex.org/W919907138","https://openalex.org/W1697439211","https://openalex.org/W2493772236","https://openalex.org/W2034057217","https://openalex.org/W956872486","https://openalex.org/W3002942576","https://openalex.org/W3015199240","https://openalex.org/W1444397010","https://openalex.org/W3091205277","https://openalex.org/W2047569150"],"abstract_inverted_index":{"Three-dimensional":[0],"chip":[1,18,82],"(3-D)":[2],"stacking":[3,19,87],"technology":[4],"provides":[5],"a":[6,41,70,107,141],"new":[7],"approach":[8],"to":[9,37,62,91,116,174,189,204],"address":[10,60],"the":[11,50,118,121,125,156,176,209],"so-called":[12],"memory":[13,22,39,104,122],"wall":[14,23,123],"problem.":[15],"Memory":[16],"processor":[17,31,126],"reduces":[20],"this":[21,90],"problem,":[24],"permitting":[25,34],"faster":[26],"clock":[27,185],"rates":[28],"(with":[29],"suitable":[30],"logic)":[32],"or":[33,213],"multicore":[35],"access":[36,75],"shared":[38,103],"using":[40,78],"large":[42,108],"number":[43,109],"of":[44,57,67,73,110,120,158,181,211],"vertical":[45,149],"vias":[46],"between":[47],"tiers":[48],"in":[49,140,166,187],"stack,":[51],"for":[52,183],"ultrawide":[53],"bit":[54],"path":[55],"transfer":[56],"data":[58],"and":[59,63,130,155,162],"information":[61],"from":[64],"various":[65],"levels":[66],"cache.":[68],"Although":[69],"limited":[71],"amount":[72],"parallel":[74],"is":[76,173],"possible":[77],"conventional":[79,159],"two-dimensional":[80],"(2-D)":[81],"memory-processor":[83,86],"approaches,":[84],"3-D":[85,142],"greatly":[88],"extends":[89],"much":[92],"larger":[93],"capacity":[94],"memories.":[95],"We":[96],"evaluate":[97],"high-clock-rate":[98],"processors":[99,105,195,206],"as":[100,102,145],"well":[101],"with":[106,151,199],"cores.":[111],"Various":[112],"architectural":[113,135],"design":[114],"options":[115],"reduce":[117,175],"impact":[119],"on":[124,208],"performance":[127,192],"are":[128],"explored":[129],"validated":[131],"through":[132],"simulations.":[133],"Certain":[134],"features":[136],"can":[137,196],"be":[138,197],"implemented":[139],"chip,":[143],"such":[144],"an":[146],"ultrawide,":[147],"ultrashort":[148],"bus":[150],"low":[152],"parasitic":[153],"resistance":[154],"elimination":[157],"electrostatic":[160],"discharge,":[161],"packaging":[163],"parasitics":[164],"required":[165],"multiple":[167],"package":[168],"2-D":[169],"solutions.":[170],"The":[171],"objective":[172],"clocks":[177],"per":[178],"instruction":[179],"figure":[180],"merit":[182],"high":[184],"speeds":[186],"order":[188,210],"deliver":[190],"significant":[191],"levels.":[193],"High-clock-rate":[194],"designed":[198],"SiGe":[200],"heterostructure":[201],"bipolar":[202],"transistors":[203],"obtain":[205],"operating":[207],"16":[212],"32":[214],"GHz.":[215]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":12},{"year":2012,"cited_by_count":8}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}