{"id":"https://openalex.org/W2085176118","doi":"https://doi.org/10.1109/jproc.2006.875789","title":"Asynchronous Techniques for System-on-Chip Design","display_name":"Asynchronous Techniques for System-on-Chip Design","publication_year":2006,"publication_date":"2006-06-01","ids":{"openalex":"https://openalex.org/W2085176118","doi":"https://doi.org/10.1109/jproc.2006.875789","mag":"2085176118"},"language":"en","primary_location":{"id":"doi:10.1109/jproc.2006.875789","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jproc.2006.875789","pdf_url":null,"source":{"id":"https://openalex.org/S68686220","display_name":"Proceedings of the IEEE","issn_l":"0018-9219","issn":["0018-9219","1558-2256"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113509326","display_name":"Alain J. Martin","orcid":null},"institutions":[{"id":"https://openalex.org/I122411786","display_name":"California Institute of Technology","ror":"https://ror.org/05dxps055","country_code":"US","type":"education","lineage":["https://openalex.org/I122411786"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A.J. Martin","raw_affiliation_strings":["Department of Computer Science, California Institute of Technology, Pasadena, CA, USA","Department of Computer Science California Institute of Technology  Pasadena, CA USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, California Institute of Technology, Pasadena, CA, USA","institution_ids":["https://openalex.org/I122411786"]},{"raw_affiliation_string":"Department of Computer Science California Institute of Technology  Pasadena, CA USA","institution_ids":["https://openalex.org/I122411786"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071046183","display_name":"M. Nystrom","orcid":null},"institutions":[{"id":"https://openalex.org/I122411786","display_name":"California Institute of Technology","ror":"https://ror.org/05dxps055","country_code":"US","type":"education","lineage":["https://openalex.org/I122411786"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Nystrom","raw_affiliation_strings":["Department of Computer Science, California Institute of Technology, Pasadena, CA, USA","Department of Computer Science California Institute of Technology  Pasadena, CA USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, California Institute of Technology, Pasadena, CA, USA","institution_ids":["https://openalex.org/I122411786"]},{"raw_affiliation_string":"Department of Computer Science California Institute of Technology  Pasadena, CA USA","institution_ids":["https://openalex.org/I122411786"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I122411786"],"apc_list":null,"apc_paid":null,"fwci":15.9205,"has_fulltext":false,"cited_by_count":305,"citation_normalized_percentile":{"value":0.99389081,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":100},"biblio":{"volume":"94","issue":"6","first_page":"1089","last_page":"1120"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/synchronizer","display_name":"Synchronizer","score":0.9462632536888123},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.9269999861717224},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8055617213249207},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.6345117092132568},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5610207915306091},{"id":"https://openalex.org/keywords/handshake","display_name":"Handshake","score":0.5483997464179993},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.495328813791275},{"id":"https://openalex.org/keywords/clock-synchronization","display_name":"Clock synchronization","score":0.45808497071266174},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.45788466930389404},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.415389746427536},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4116145372390747},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4088524281978607},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.21466794610023499},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.20729288458824158},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.1672787070274353},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11512753367424011}],"concepts":[{"id":"https://openalex.org/C66727535","wikidata":"https://www.wikidata.org/wiki/Q7662199","display_name":"Synchronizer","level":2,"score":0.9462632536888123},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.9269999861717224},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8055617213249207},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.6345117092132568},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5610207915306091},{"id":"https://openalex.org/C2778000800","wikidata":"https://www.wikidata.org/wiki/Q830043","display_name":"Handshake","level":3,"score":0.5483997464179993},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.495328813791275},{"id":"https://openalex.org/C129891060","wikidata":"https://www.wikidata.org/wiki/Q1513059","display_name":"Clock synchronization","level":4,"score":0.45808497071266174},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.45788466930389404},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.415389746427536},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4116145372390747},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4088524281978607},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.21466794610023499},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.20729288458824158},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.1672787070274353},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11512753367424011},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jproc.2006.875789","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jproc.2006.875789","pdf_url":null,"source":{"id":"https://openalex.org/S68686220","display_name":"Proceedings of the IEEE","issn_l":"0018-9219","issn":["0018-9219","1558-2256"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE","raw_type":"journal-article"},{"id":"pmh:oai:authors.library.caltech.edu:5363","is_oa":false,"landing_page_url":"https://authors.library.caltech.edu/5363/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402161","display_name":"CaltechAUTHORS (California Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I122411786","host_organization_name":"California Institute of Technology","host_organization_lineage":["https://openalex.org/I122411786"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.5,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":64,"referenced_works":["https://openalex.org/W16511050","https://openalex.org/W158833317","https://openalex.org/W1512610407","https://openalex.org/W1544623790","https://openalex.org/W1546435617","https://openalex.org/W1554812212","https://openalex.org/W1555253106","https://openalex.org/W1577323490","https://openalex.org/W1578016017","https://openalex.org/W1609287256","https://openalex.org/W1666015432","https://openalex.org/W1733023992","https://openalex.org/W1795974572","https://openalex.org/W1871093416","https://openalex.org/W1889218533","https://openalex.org/W1967575124","https://openalex.org/W2033045135","https://openalex.org/W2033724727","https://openalex.org/W2048762589","https://openalex.org/W2051549005","https://openalex.org/W2052006175","https://openalex.org/W2060139911","https://openalex.org/W2086285232","https://openalex.org/W2089904802","https://openalex.org/W2099034654","https://openalex.org/W2099103090","https://openalex.org/W2101317259","https://openalex.org/W2104105510","https://openalex.org/W2110425399","https://openalex.org/W2112255682","https://openalex.org/W2116651175","https://openalex.org/W2117897741","https://openalex.org/W2126142231","https://openalex.org/W2126590585","https://openalex.org/W2129008669","https://openalex.org/W2130434989","https://openalex.org/W2134829921","https://openalex.org/W2150872535","https://openalex.org/W2153658286","https://openalex.org/W2156956883","https://openalex.org/W2160823654","https://openalex.org/W2161331676","https://openalex.org/W2165873073","https://openalex.org/W2167775755","https://openalex.org/W2168281491","https://openalex.org/W2247475328","https://openalex.org/W2315905328","https://openalex.org/W2504788735","https://openalex.org/W2970264471","https://openalex.org/W3144368627","https://openalex.org/W4211008702","https://openalex.org/W4243962819","https://openalex.org/W4243983003","https://openalex.org/W4251013638","https://openalex.org/W4298011152","https://openalex.org/W6630798113","https://openalex.org/W6633282629","https://openalex.org/W6637661693","https://openalex.org/W6638517581","https://openalex.org/W6639291323","https://openalex.org/W6683394555","https://openalex.org/W6691184456","https://openalex.org/W6977921150","https://openalex.org/W7062389935"],"related_works":["https://openalex.org/W2095703739","https://openalex.org/W1863704131","https://openalex.org/W158833317","https://openalex.org/W2325117947","https://openalex.org/W2124260068","https://openalex.org/W628161287","https://openalex.org/W2948898796","https://openalex.org/W794031490","https://openalex.org/W2349909378","https://openalex.org/W1991539879"],"abstract_inverted_index":{"SoC":[0],"design":[1,63],"will":[2,14,31,51],"require":[3],"asynchronous":[4,34,56,70,104,109],"techniques":[5],"as":[6,100],"the":[7,12,40,43,61,83,98,101,115,140,176],"large":[8],"parameter":[9],"variations":[10],"across":[11],"chip":[13],"make":[15],"it":[16],"impossible":[17],"to":[18,54],"control":[19],"delays":[20],"in":[21,48,97,157,163,171],"clock":[22],"networks":[23],"and":[24,35,66,78,114,120,131,135,151,161,182],"other":[25,177],"global":[26],"signals":[27],"efficiently.":[28],"Initially,":[29],"SoCs":[30],"be":[32],"globally":[33],"locally":[36],"synchronous":[37],"(GALS).":[38],"But":[39],"complexity":[41],"of":[42,87,117,142,149],"numerous":[44],"asynchronous/synchronous":[45,168],"interfaces":[46,169],"required":[47],"a":[49],"GALS":[50],"eventually":[52],"lead":[53],"entirely":[55],"solutions.":[57],"This":[58],"paper":[59,99,107],"introduces":[60],"main":[62,167],"principles,":[64],"methods,":[65],"building":[67,124],"blocks":[68,125],"for":[69,103,112,126,139],"VLSI":[71],"systems,":[72],"with":[73,82],"an":[74,143,154],"emphasis":[75],"on":[76,174,178],"communication":[77,113],"synchronization.":[79],"Asynchronous":[80],"circuits":[81],"only":[84],"delay":[85],"assumption":[86],"isochronic":[88],"forks":[89],"are":[90,133,146],"called":[91],"quasi-delay-insensitive":[92],"(QDI).":[93],"QDI":[94],"is":[95],"used":[96],"basis":[102],"logic.":[105],"The":[106,165],"discusses":[108],"handshake":[110],"protocols":[111],"notion":[116],"validity/neutrality":[118],"tests,":[119],"completion":[121],"tree.":[122],"Basic":[123],"sequencing,":[127],"storage,":[128],"function":[129],"evaluation,":[130],"buses":[132],"described,":[134],"two":[136,166],"alternative":[137],"methods":[138],"implementation":[141],"arbitrary":[144],"computation":[145],"explained.":[147],"Issues":[148],"arbitration,":[150],"synchronization":[152],"play":[153],"important":[155],"role":[156],"complex":[158],"distributed":[159],"systems":[160],"especially":[162],"GALS.":[164],"needed":[170],"GALS-one":[172],"based":[173],"synchronizer,":[175],"stoppable":[179],"clock-are":[180],"described":[181],"analyzed.":[183]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":10},{"year":2022,"cited_by_count":12},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":13},{"year":2019,"cited_by_count":13},{"year":2018,"cited_by_count":16},{"year":2017,"cited_by_count":17},{"year":2016,"cited_by_count":20},{"year":2015,"cited_by_count":27},{"year":2014,"cited_by_count":36},{"year":2013,"cited_by_count":26},{"year":2012,"cited_by_count":14}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}