{"id":"https://openalex.org/W7123337354","doi":"https://doi.org/10.1109/jiot.2026.3651798","title":"RL Algorithm-Based Optimization Design of 16-bit <i>\u03a3</i> \u0394 ADC for High-Precision Smart Sensor System","display_name":"RL Algorithm-Based Optimization Design of 16-bit <i>\u03a3</i> \u0394 ADC for High-Precision Smart Sensor System","publication_year":2026,"publication_date":"2026-01-12","ids":{"openalex":"https://openalex.org/W7123337354","doi":"https://doi.org/10.1109/jiot.2026.3651798"},"language":null,"primary_location":{"id":"doi:10.1109/jiot.2026.3651798","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jiot.2026.3651798","pdf_url":null,"source":{"id":"https://openalex.org/S2480266640","display_name":"IEEE Internet of Things Journal","issn_l":"2327-4662","issn":["2327-4662","2372-2541"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Internet of Things Journal","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007555871","display_name":"Yunqi Yang","orcid":"https://orcid.org/0000-0002-7045-082X"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yunqi Yang","raw_affiliation_strings":["Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-7045-082X","affiliations":[{"raw_affiliation_string":"Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5122846244","display_name":"Daoming Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Daoming Zhang","raw_affiliation_strings":["Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0009-0006-6264-1390","affiliations":[{"raw_affiliation_string":"Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5122851846","display_name":"Wenlong Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenlong Xu","raw_affiliation_strings":["Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Dongdong Chen","orcid":"https://orcid.org/0000-0002-5065-4374"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dongdong Chen","raw_affiliation_strings":["Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-5065-4374","affiliations":[{"raw_affiliation_string":"Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5122857776","display_name":"Qidong Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qidong Zhang","raw_affiliation_strings":["Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0003-2648-2039","affiliations":[{"raw_affiliation_string":"Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5122855607","display_name":"Di Li","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Di Li","raw_affiliation_strings":["Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0001-6118-7401","affiliations":[{"raw_affiliation_string":"Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080579087","display_name":"S. W. Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shibing Zhang","raw_affiliation_strings":["Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5122870668","display_name":"Yintang Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yintang Yang","raw_affiliation_strings":["Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0001-9745-5404","affiliations":[{"raw_affiliation_string":"Faculty of Integrated Circuit, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5007555871"],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06682632,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"13","issue":"6","first_page":"12340","last_page":"12349"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.8342000246047974,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.8342000246047974,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.013299999758601189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12794","display_name":"Adaptive Dynamic Programming Control","score":0.01080000028014183,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.6083999872207642},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.503000020980835},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.45590001344680786},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.41350001096725464},{"id":"https://openalex.org/keywords/reinforcement-learning","display_name":"Reinforcement learning","score":0.40880000591278076},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.39969998598098755},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3968000113964081},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.3652999997138977}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7957000136375427},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.6083999872207642},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5180000066757202},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.503000020980835},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.45590001344680786},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.41350001096725464},{"id":"https://openalex.org/C97541855","wikidata":"https://www.wikidata.org/wiki/Q830687","display_name":"Reinforcement learning","level":2,"score":0.40880000591278076},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.39969998598098755},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3968000113964081},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.3652999997138977},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.36410000920295715},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.36329999566078186},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.3506999909877777},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.34850001335144043},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3465000092983246},{"id":"https://openalex.org/C13944312","wikidata":"https://www.wikidata.org/wiki/Q7512748","display_name":"Signal-to-noise ratio (imaging)","level":2,"score":0.33160001039505005},{"id":"https://openalex.org/C2777271169","wikidata":"https://www.wikidata.org/wiki/Q190169","display_name":"Analog-to-digital converter","level":3,"score":0.32659998536109924},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2971999943256378},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2856999933719635},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2809000015258789},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.2766000032424927},{"id":"https://openalex.org/C137836250","wikidata":"https://www.wikidata.org/wiki/Q984063","display_name":"Optimization problem","level":2,"score":0.2535000145435333}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jiot.2026.3651798","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jiot.2026.3651798","pdf_url":null,"source":{"id":"https://openalex.org/S2480266640","display_name":"IEEE Internet of Things Journal","issn_l":"2327-4662","issn":["2327-4662","2372-2541"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Internet of Things Journal","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1296667907","display_name":null,"funder_award_id":"62090043","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G7889665364","display_name":null,"funder_award_id":"61934006","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8100522184","display_name":null,"funder_award_id":"2022YFB4401300","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1983268951","https://openalex.org/W2106470729","https://openalex.org/W2128234435","https://openalex.org/W2343390272","https://openalex.org/W2787550481","https://openalex.org/W2885447634","https://openalex.org/W3013556183","https://openalex.org/W3044459401","https://openalex.org/W3160469020","https://openalex.org/W3166315890","https://openalex.org/W3203408580","https://openalex.org/W3205090792","https://openalex.org/W4226354872","https://openalex.org/W4292055175","https://openalex.org/W4388740182","https://openalex.org/W4392093383","https://openalex.org/W4396753438","https://openalex.org/W4401416862","https://openalex.org/W4404179377","https://openalex.org/W4405092686","https://openalex.org/W4406001870","https://openalex.org/W4407169209","https://openalex.org/W4408092141","https://openalex.org/W4408240568","https://openalex.org/W4408716020","https://openalex.org/W4410294578","https://openalex.org/W4410809046","https://openalex.org/W4414322207"],"related_works":[],"abstract_inverted_index":{"To":[0],"capture":[1],"the":[2,9,20,25,48,59,71,79,84,94,99,108,115,118,123,131,134,139,153,168,175,183,186,195,204,215,220,227,232],"small":[3],"signal":[4],"of":[5,65,74,101,133,222,234],"smart":[6],"sensor":[7],"system,":[8],"high-precision":[10],"sigma":[11],"delta":[12],"analog":[13],"to":[14,53,57,77,92,97],"digital":[15],"converter":[16],"(\u03a3\u0394":[17],"ADC)":[18],"is":[19,38,160,171,178],"essential":[21],"components.":[22],"Based":[23],"on":[24],"reinforcement":[26],"learning":[27],"(RL)":[28],"algorithm,":[29],"a":[30],"high-efficiency":[31],"design":[32,60,207,216],"method":[33,121,208],"for":[34,209],"16-bit":[35],"\u03a3\u0394":[36,49,109,158,210,223],"ADC":[37,50,110,159,211],"proposed":[39,119,135,205],"in":[40,47,107,231],"this":[41],"research.":[42],"The":[43,62,156,163],"key":[44,105],"circuit":[45,95],"modules":[46],"are":[51,90,111],"extracted":[52],"be":[54,68,143,190,199],"separately":[55],"optimized":[56,157],"decrease":[58,214],"complexity.":[61],"prior":[63],"knowledge":[64],"circuits":[66,106],"can":[67,142,149,189,198,212],"introduced":[69],"into":[70],"search":[72,80],"process":[73],"RL":[75],"algorithm":[76],"accelerate":[78],"speed.":[81],"In":[82,137],"addition,":[83,138],"deep":[85],"neural":[86],"network":[87],"(DNN)":[88],"models":[89],"trained":[91],"replace":[93],"simulator":[96],"reduce":[98],"cost":[100],"simulation":[102,140],"resource.":[103],"Two":[104],"optimized.":[112],"Compared":[113,181],"with":[114,182],"advanced":[116],"method,":[117],"optimization":[120,154,206],"has":[122],"fastest":[124],"convergency":[125],"and":[126,174,194,218],"best":[127],"performance,":[128],"which":[129,148,225],"demonstrates":[130],"effectiveness":[132],"method.":[136],"time":[141],"decreased":[144,200],"by":[145,192,201],"98.3":[146],"%,":[147],"greatly":[150,213],"speed":[151],"up":[152],"process.":[155],"taped":[161],"out.":[162],"test":[164],"results":[165],"show":[166],"that":[167],"effective":[169,187],"resolution":[170,188],"16.16":[172],"bit,":[173],"voltage":[176,197],"noise":[177,196],"8.7e-05":[179],"V.":[180],"original":[184],"chip,":[185],"improved":[191],"6.3%,":[193],"47%.":[202],"Therefore,":[203],"cycle":[217],"improve":[219],"performance":[221],"ADC,":[224],"presents":[226],"enormous":[228],"potential":[229],"application":[230],"internet":[233],"things.":[235]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2026-01-14T00:00:00"}