{"id":"https://openalex.org/W4411203402","doi":"https://doi.org/10.1109/jiot.2025.3578639","title":"Transmission Channel and Matching Network Design Strategies in Chiplet-Based 2.5-D ICs for RF Applications","display_name":"Transmission Channel and Matching Network Design Strategies in Chiplet-Based 2.5-D ICs for RF Applications","publication_year":2025,"publication_date":"2025-06-11","ids":{"openalex":"https://openalex.org/W4411203402","doi":"https://doi.org/10.1109/jiot.2025.3578639"},"language":"en","primary_location":{"id":"doi:10.1109/jiot.2025.3578639","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jiot.2025.3578639","pdf_url":null,"source":{"id":"https://openalex.org/S2480266640","display_name":"IEEE Internet of Things Journal","issn_l":"2327-4662","issn":["2327-4662","2372-2541"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Internet of Things Journal","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049352548","display_name":"Changle Zhi","orcid":"https://orcid.org/0000-0003-3156-0564"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Changle Zhi","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0003-3156-0564","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082281062","display_name":"Gang Dong","orcid":"https://orcid.org/0000-0001-6557-2286"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Gang Dong","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0001-6557-2286","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109672249","display_name":"Deguang Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Deguang Yang","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0009-0009-0316-3474","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Xin Luo","orcid":"https://orcid.org/0009-0003-5788-3457"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xin Luo","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0009-0003-5788-3457","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069545138","display_name":"Jiabao Yao","orcid":"https://orcid.org/0009-0009-4109-2048"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junpeng Yao","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059052067","display_name":"Daihang Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Daihang Liu","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0009-0005-6262-098X","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039575274","display_name":"Zhangming Zhu","orcid":"https://orcid.org/0000-0002-7764-1928"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-7764-1928","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Integrated Circuits, Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education ), Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09636065,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"12","issue":"17","first_page":"35226","last_page":"35236"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7097461819648743},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5381556153297424},{"id":"https://openalex.org/keywords/radio-frequency","display_name":"Radio frequency","score":0.4914771318435669},{"id":"https://openalex.org/keywords/transmission","display_name":"Transmission (telecommunications)","score":0.4627077579498291},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.4575130343437195},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.4122258126735687},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.3513006567955017},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16366004943847656}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7097461819648743},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5381556153297424},{"id":"https://openalex.org/C74064498","wikidata":"https://www.wikidata.org/wiki/Q3396184","display_name":"Radio frequency","level":2,"score":0.4914771318435669},{"id":"https://openalex.org/C761482","wikidata":"https://www.wikidata.org/wiki/Q118093","display_name":"Transmission (telecommunications)","level":2,"score":0.4627077579498291},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.4575130343437195},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.4122258126735687},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.3513006567955017},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16366004943847656}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jiot.2025.3578639","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jiot.2025.3578639","pdf_url":null,"source":{"id":"https://openalex.org/S2480266640","display_name":"IEEE Internet of Things Journal","issn_l":"2327-4662","issn":["2327-4662","2372-2541"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Internet of Things Journal","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4000000059604645,"id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G1981401797","display_name":null,"funder_award_id":"U23A20291","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G2320218852","display_name":null,"funder_award_id":"62021004","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G783504360","display_name":null,"funder_award_id":"2023YFF0616600","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"},{"id":"https://openalex.org/G8447460718","display_name":null,"funder_award_id":"ZYTS25220","funder_id":"https://openalex.org/F4320335787","funder_display_name":"Fundamental Research Funds for the Central Universities"},{"id":"https://openalex.org/G8921095769","display_name":null,"funder_award_id":"62404171","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335443","display_name":"Postdoctoral Research Foundation of China","ror":null},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null},{"id":"https://openalex.org/F4320335787","display_name":"Fundamental Research Funds for the Central Universities","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W2039753834","https://openalex.org/W2097941400","https://openalex.org/W2116494573","https://openalex.org/W2160837841","https://openalex.org/W2170518417","https://openalex.org/W2314035716","https://openalex.org/W2478573227","https://openalex.org/W2560529905","https://openalex.org/W2590051241","https://openalex.org/W2899682587","https://openalex.org/W3021910367","https://openalex.org/W3080132014","https://openalex.org/W3091350331","https://openalex.org/W3098665021","https://openalex.org/W3163146498","https://openalex.org/W4205395451","https://openalex.org/W4213083061","https://openalex.org/W4285451629","https://openalex.org/W4292387147","https://openalex.org/W4293812269","https://openalex.org/W4296916438","https://openalex.org/W4307040489","https://openalex.org/W4312411365","https://openalex.org/W4319302806","https://openalex.org/W4376481211","https://openalex.org/W4382999279","https://openalex.org/W4385525498","https://openalex.org/W4386702784","https://openalex.org/W4387010790","https://openalex.org/W4387987100","https://openalex.org/W4394595726","https://openalex.org/W4396629569","https://openalex.org/W4398188070","https://openalex.org/W4400275716","https://openalex.org/W4400410564","https://openalex.org/W4401568239","https://openalex.org/W4402265515","https://openalex.org/W4403674967","https://openalex.org/W4403724456","https://openalex.org/W4406753855"],"related_works":["https://openalex.org/W2111375262","https://openalex.org/W2317728013","https://openalex.org/W4252076617","https://openalex.org/W1991205173","https://openalex.org/W2109048960","https://openalex.org/W2741481635","https://openalex.org/W2338537463","https://openalex.org/W2183644707","https://openalex.org/W2038165453","https://openalex.org/W1885824365"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,32,46,95,139],"neural":[4,76],"network-based":[5],"approach":[6],"for":[7,22,145],"the":[8,54,107],"co-design":[9],"of":[10],"transmission":[11,57],"channels":[12],"and":[13,66,90,132],"matching":[14,67,91,128],"networks":[15],"in":[16,149],"chiplet-based":[17],"2.5-D":[18,55],"integrated":[19],"circuits":[20],"(ICs)":[21],"radio":[23],"frequency":[24,133],"(RF)":[25],"applications":[26],"is":[27,49,79],"presented.":[28],"This":[29,136],"work":[30,137],"proposes":[31],"dual-neural":[33],"network":[34,77,92,129],"framework":[35,115],"that":[36],"synergizes":[37],"cascaded":[38,47],"S-parameter":[39,85,103],"modeling":[40],"with":[41,119],"data":[42],"augmentation":[43],"techniques.":[44],"First,":[45],"method":[48],"developed":[50],"to":[51,82,87,105],"accurately":[52],"model":[53,99],"signal":[56],"channel,":[58],"incorporating":[59],"through-silicon":[60],"vias":[61],"(TSVs),":[62],"redistribution":[63],"layers":[64],"(RDLs),":[65],"networks,":[68],"validated":[69],"against":[70],"commercial":[71],"circuit":[72],"tools.":[73],"A":[74],"convolutional":[75],"(CNN)":[78],"then":[80],"trained":[81],"inversely":[83],"map":[84],"requirements":[86],"optimal":[88],"structural":[89],"parameters.":[93],"Concurrently,":[94],"denoising":[96],"diffusion":[97],"probabilistic":[98],"(DDPM)":[100],"generates":[101],"augmented":[102],"datasets":[104],"expand":[106],"design":[108],"space":[109],"while":[110,122],"reducing":[111],"simulation":[112],"overhead.":[113],"The":[114],"enables":[116],"automated":[117],"compliance":[118],"critical":[120],"constraints":[121],"optimizing":[123],"secondary":[124],"objectives":[125],"such":[126],"as":[127],"area":[130],"minimization":[131],"response":[134],"enhancement.":[135],"provides":[138],"robust":[140],"artificial":[141],"intelligence":[142],"(AI)-driven":[143],"methodology":[144],"high-efficiency":[146],"RF":[147],"interconnects":[148],"heterogeneous":[150],"integration":[151],"platforms.":[152]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
