{"id":"https://openalex.org/W7128616701","doi":"https://doi.org/10.1109/jetcas.2026.3663895","title":"Variation-Tolerant Circuit Design and Online Learning Framework for Memristor-Based Trace-STDP SNN","display_name":"Variation-Tolerant Circuit Design and Online Learning Framework for Memristor-Based Trace-STDP SNN","publication_year":2026,"publication_date":"2026-02-11","ids":{"openalex":"https://openalex.org/W7128616701","doi":"https://doi.org/10.1109/jetcas.2026.3663895"},"language":null,"primary_location":{"id":"doi:10.1109/jetcas.2026.3663895","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jetcas.2026.3663895","pdf_url":null,"source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5125643848","display_name":"Yi Zheng","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yi Zheng","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0006-2754-2477","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100598212","display_name":"Yuhan He","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuhan He","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0002-0240-1898","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111020775","display_name":"Ruisi Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ruisi Shen","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125658744","display_name":"Jie Li","orcid":null},"institutions":[{"id":"https://openalex.org/I90610280","display_name":"South China University of Technology","ror":"https://ror.org/0530pts50","country_code":"CN","type":"education","lineage":["https://openalex.org/I90610280"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jie Li","raw_affiliation_strings":["School of Future Technology, South China University of Technology, Guangzhou, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Future Technology, South China University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I90610280"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125674825","display_name":"Ruijia Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ruijia Wang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125674154","display_name":"Deyu Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Deyu Wang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-4674-3497","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5122867903","display_name":"Li-Rong Zheng","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li-Rong Zheng","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-9588-0239","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125632942","display_name":"Zhuo Zou","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhuo Zou","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-8546-1329","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100743218","display_name":"Jiawei Xu","orcid":"https://orcid.org/0000-0002-6192-558X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Jiawei Xu","raw_affiliation_strings":["ECE Department, State Key Laboratory of Analog and Mixed-Signal VLSI/Institute of Microelectronics and the Faculty of Science and Technology, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0002-6192-558X","affiliations":[{"raw_affiliation_string":"ECE Department, State Key Laboratory of Analog and Mixed-Signal VLSI/Institute of Microelectronics and the Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":9,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15987817,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"16","issue":"2","first_page":"348","last_page":"362"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.0010000000474974513,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.0005000000237487257,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.8628000020980835},{"id":"https://openalex.org/keywords/spiking-neural-network","display_name":"Spiking neural network","score":0.7587000131607056},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.5539000034332275},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.4480000138282776},{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.436599999666214},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.43149998784065247},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4043000042438507},{"id":"https://openalex.org/keywords/chaining","display_name":"Chaining","score":0.399399995803833},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.39320001006126404}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.8628000020980835},{"id":"https://openalex.org/C11731999","wikidata":"https://www.wikidata.org/wiki/Q9067355","display_name":"Spiking neural network","level":3,"score":0.7587000131607056},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7560999989509583},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6284000277519226},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.5539000034332275},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.4480000138282776},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.436599999666214},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.43149998784065247},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4043000042438507},{"id":"https://openalex.org/C49020025","wikidata":"https://www.wikidata.org/wiki/Q1059099","display_name":"Chaining","level":2,"score":0.399399995803833},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3939000070095062},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.39320001006126404},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.3684000074863434},{"id":"https://openalex.org/C105339364","wikidata":"https://www.wikidata.org/wiki/Q2297740","display_name":"Software deployment","level":2,"score":0.357699990272522},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.35670000314712524},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3361999988555908},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.33390000462532043},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.33000001311302185},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.3237999975681305},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.30809998512268066},{"id":"https://openalex.org/C190502265","wikidata":"https://www.wikidata.org/wiki/Q17069496","display_name":"MNIST database","level":3,"score":0.29019999504089355},{"id":"https://openalex.org/C46686674","wikidata":"https://www.wikidata.org/wiki/Q466303","display_name":"Boosting (machine learning)","level":2,"score":0.2849999964237213},{"id":"https://openalex.org/C2780156850","wikidata":"https://www.wikidata.org/wiki/Q2144097","display_name":"Technology roadmap","level":2,"score":0.27880001068115234},{"id":"https://openalex.org/C2776848632","wikidata":"https://www.wikidata.org/wiki/Q853463","display_name":"Clipping (morphology)","level":2,"score":0.2759999930858612},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.2678999900817871},{"id":"https://openalex.org/C97541855","wikidata":"https://www.wikidata.org/wiki/Q830687","display_name":"Reinforcement learning","level":2,"score":0.2678000032901764},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.26759999990463257},{"id":"https://openalex.org/C188198153","wikidata":"https://www.wikidata.org/wiki/Q1613840","display_name":"Limiting","level":2,"score":0.2632000148296356},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.2574999928474426},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2508000135421753}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jetcas.2026.3663895","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jetcas.2026.3663895","pdf_url":null,"source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8940905332565308}],"awards":[{"id":"https://openalex.org/G2656969043","display_name":null,"funder_award_id":"SRG2024-00055-IME","funder_id":"https://openalex.org/F4320322841","funder_display_name":"Universidade de Macau"},{"id":"https://openalex.org/G3207663910","display_name":null,"funder_award_id":"MYRG-GRG2025-00283-IME","funder_id":"https://openalex.org/F4320322841","funder_display_name":"Universidade de Macau"},{"id":"https://openalex.org/G3219446551","display_name":null,"funder_award_id":"62476062","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8748446505","display_name":null,"funder_award_id":"UMDFTISF/2025/012/IME","funder_id":"https://openalex.org/F4320322841","funder_display_name":"Universidade de Macau"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320322841","display_name":"Universidade de Macau","ror":"https://ror.org/01r4q9n85"},{"id":"https://openalex.org/F4320329902","display_name":"Shanghai Platform for Neuromorphic and AI Chip","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Spiking":[0],"neural":[1],"networks":[2],"(SNNs)":[3],"demonstrate":[4],"significant":[5],"potential":[6],"for":[7,65,108],"energy-efficient":[8,43],"neuromorphic":[9,71,214],"computing,":[10],"while":[11,187],"trace-based":[12],"spike-timing":[13],"dependent":[14],"plasticity":[15],"(trace-STDP)":[16],"serves":[17],"as":[18],"a":[19,62,103,146,154,170,176,182,188],"biologically":[20],"inspired":[21],"learning":[22,106],"rule":[23],"to":[24,37,50,169],"improve":[25],"SNN":[26,33,90,111],"temporal":[27],"learning.":[28],"Memristor-based":[29],"implementations":[30],"of":[31,69,212],"trace-STDP":[32,49,89,110],"leverage":[34],"device":[35],"non-linearity":[36],"emulate":[38],"synaptic":[39],"dynamics,":[40],"enabling":[41],"highly":[42],"computation.":[44],"However,":[45,82],"the":[46,66,88,197,200,208],"mapping":[47],"from":[48],"memristor":[51],"arrays":[52],"introduces":[53],"inherent":[54],"variations,":[55],"which":[56],"significantly":[57,138],"degrade":[58],"network":[59,140],"accuracy,":[60],"posing":[61],"critical":[63],"challenge":[64],"reliable":[67],"deployment":[68],"memristor-based":[70,109,213],"systems.":[72],"To":[73,142],"address":[74],"this":[75,101],"issue,":[76],"efficient":[77],"variation-tolerant":[78,148,165],"strategies":[79],"are":[80],"essential.":[81],"current":[83],"approaches":[84],"do":[85],"not":[86],"take":[87],"characteristics":[91],"into":[92,199],"consideration,":[93],"thereby":[94],"limiting":[95],"their":[96],"algorithm-and":[97],"hardware-level":[98],"effectiveness.":[99],"In":[100],"work,":[102],"variation-aware":[104],"online":[105],"framework":[107,202],"is":[112,130,150],"proposed,":[113],"with":[114,153,174],"hierarchical":[115],"simulations":[116],"integrated":[117],"across":[118],"software,":[119],"ASIC,":[120],"memristor-array,":[121],"and":[122,159,181,210],"memristor-device":[123],"levels.":[124],"Through":[125],"variation":[126],"analysis":[127],"experiments,":[128],"it":[129],"observed":[131],"that":[132],"variations":[133],"in":[134],"near-zero":[135],"trace":[136],"values":[137],"impact":[139],"accuracy.":[141],"mitigate":[143],"these":[144],"effects,":[145],"tailored":[147],"strategy":[149],"developed,":[151],"together":[152],"configurable":[155],"hardware":[156],"clipping":[157],"unit":[158],"an":[160],"ASIC/memristor":[161],"co-simulator.":[162],"The":[163],"proposed":[164,201],"design":[166,190,204],"achieves":[167],"up":[168],"16.97%":[171],"accuracy":[172],"improvement,":[173],"only":[175],"0.02%":[177],"extra":[178,184],"power":[179],"overhead":[180],"0.01%":[183],"area":[185],"overhead,":[186],"parallel":[189],"ensures":[191],"no":[192],"additional":[193],"latency":[194],"overhead.":[195],"Integrating":[196],"co-simulator":[198],"facilitates":[203],"space":[205],"exploration,":[206],"enhancing":[207],"robustness":[209],"efficiency":[211],"computing.":[215]},"counts_by_year":[],"updated_date":"2026-06-16T07:32:37.131356","created_date":"2026-02-12T00:00:00"}
