{"id":"https://openalex.org/W4285305074","doi":"https://doi.org/10.1109/jetcas.2022.3171765","title":"Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives","display_name":"Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives","publication_year":2022,"publication_date":"2022-05-12","ids":{"openalex":"https://openalex.org/W4285305074","doi":"https://doi.org/10.1109/jetcas.2022.3171765"},"language":"en","primary_location":{"id":"doi:10.1109/jetcas.2022.3171765","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jetcas.2022.3171765","pdf_url":"https://ieeexplore.ieee.org/ielx7/5503868/9794907/09774035.pdf","source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://ieeexplore.ieee.org/ielx7/5503868/9794907/09774035.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013669746","display_name":"Minh S. Q. Truong","orcid":"https://orcid.org/0000-0001-8430-2513"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Minh S. Q. Truong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":"https://orcid.org/0000-0001-8430-2513","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061888214","display_name":"Liting Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Liting Shen","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018268672","display_name":"Alexander Glass","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alexander Glass","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012671193","display_name":"Alison Hoffmann","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alison Hoffmann","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083212338","display_name":"L.R. Carley","orcid":"https://orcid.org/0000-0003-3945-9110"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"L. Richard Carley","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":"https://orcid.org/0000-0003-3945-9110","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050099355","display_name":"James A. Bain","orcid":"https://orcid.org/0000-0002-5355-5048"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James A. Bain","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036666743","display_name":"Saugata Ghose","orcid":"https://orcid.org/0000-0002-9138-0613"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saugata Ghose","raw_affiliation_strings":["Department of Computer Science, University of Illinois Urbana-Champaign, Urbana, IL, USA"],"raw_orcid":"https://orcid.org/0000-0002-9138-0613","affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Illinois Urbana-Champaign, Urbana, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4417,"has_fulltext":true,"cited_by_count":8,"citation_normalized_percentile":{"value":0.58767974,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"12","issue":"2","first_page":"393","last_page":"407"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7450097799301147},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.7221794724464417},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5948480367660522},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5416254997253418},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.5127302408218384},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5078108906745911},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.47963911294937134},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4723846912384033},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4277951717376709},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3933035731315613},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3439844846725464},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33367496728897095},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32076790928840637},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2431868314743042},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19506001472473145},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1636684238910675},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1570681631565094},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09770998358726501}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7450097799301147},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.7221794724464417},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5948480367660522},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5416254997253418},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.5127302408218384},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5078108906745911},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.47963911294937134},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4723846912384033},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4277951717376709},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3933035731315613},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3439844846725464},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33367496728897095},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32076790928840637},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2431868314743042},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19506001472473145},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1636684238910675},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1570681631565094},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09770998358726501},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jetcas.2022.3171765","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jetcas.2022.3171765","pdf_url":"https://ieeexplore.ieee.org/ielx7/5503868/9794907/09774035.pdf","source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/jetcas.2022.3171765","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jetcas.2022.3171765","pdf_url":"https://ieeexplore.ieee.org/ielx7/5503868/9794907/09774035.pdf","source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310207","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33"},{"id":"https://openalex.org/F4320317469","display_name":"Apple","ror":"https://ror.org/059hsda18"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4285305074.pdf","grobid_xml":"https://content.openalex.org/works/W4285305074.grobid-xml"},"referenced_works_count":55,"referenced_works":["https://openalex.org/W1518236483","https://openalex.org/W1993163906","https://openalex.org/W2004823737","https://openalex.org/W2023834387","https://openalex.org/W2025674646","https://openalex.org/W2027342132","https://openalex.org/W2059441802","https://openalex.org/W2062258101","https://openalex.org/W2065482379","https://openalex.org/W2066280488","https://openalex.org/W2073748734","https://openalex.org/W2081729575","https://openalex.org/W2085875981","https://openalex.org/W2099554009","https://openalex.org/W2100846455","https://openalex.org/W2135965542","https://openalex.org/W2164577583","https://openalex.org/W2169325421","https://openalex.org/W2216132385","https://openalex.org/W2331783522","https://openalex.org/W2396622873","https://openalex.org/W2433248078","https://openalex.org/W2462963692","https://openalex.org/W2487018225","https://openalex.org/W2515179975","https://openalex.org/W2585407525","https://openalex.org/W2613051255","https://openalex.org/W2613569094","https://openalex.org/W2613989746","https://openalex.org/W2623880136","https://openalex.org/W2762694365","https://openalex.org/W2765234579","https://openalex.org/W2766489088","https://openalex.org/W2788825665","https://openalex.org/W2798476846","https://openalex.org/W2801000640","https://openalex.org/W2900379535","https://openalex.org/W2913104037","https://openalex.org/W2946017187","https://openalex.org/W2950138172","https://openalex.org/W2967324946","https://openalex.org/W2979663695","https://openalex.org/W2979874885","https://openalex.org/W3002919214","https://openalex.org/W3005997294","https://openalex.org/W3145985077","https://openalex.org/W3155004489","https://openalex.org/W3174581039","https://openalex.org/W3207965708","https://openalex.org/W4243519499","https://openalex.org/W4245700406","https://openalex.org/W4254901135","https://openalex.org/W6629285079","https://openalex.org/W6682017485","https://openalex.org/W6704402733"],"related_works":["https://openalex.org/W1966764473","https://openalex.org/W2098419840","https://openalex.org/W2526300902","https://openalex.org/W2170504327","https://openalex.org/W1977171228","https://openalex.org/W2121963733","https://openalex.org/W2766377030","https://openalex.org/W2542337934","https://openalex.org/W1985308002","https://openalex.org/W2789349722"],"abstract_inverted_index":{"Modern":[0],"computing":[1],"applications":[2],"based":[3],"upon":[4],"machine":[5],"learning":[6],"can":[7,21,153],"incur":[8],"significant":[9],"data":[10,24],"movement":[11,25],"overheads":[12],"in":[13],"state-of-the-art":[14],"computers.":[15],"Resistive-memory-based":[16],"<italic":[17,30],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[18,31],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">processing-using-memory</i>":[19],"(PUM)":[20],"mitigate":[22],"this":[23,78],"by":[26,58,91,112,167],"instead":[27],"performing":[28],"computation":[29,72],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">in":[32],"situ</i>":[33],"(i.e.,":[34],"directly":[35],"within":[36],"memory":[37,75,139],"cells),":[38],"but":[39],"device-level":[40],"limitations":[41],"restrict":[42],"the":[43,64,94,129,144,149,173],"practicality":[44],"and/or":[45],"performance":[46,163],"of":[47,66,103],"many":[48],"PUM":[49,88,156],"architecture":[50,54],"proposals.":[51],"The":[52],"RACER":[53,82,146,175],"overcomes":[55],"these":[56],"limitations,":[57],"proposing":[59,117],"efficient":[60],"peripheral":[61],"circuitry":[62,97],"and":[63,115,118,164,169],"concept":[65],"bit-pipelining":[67],"to":[68,83,86,98,134],"enable":[69,154],"high-performance,":[70],"high-efficiency":[71],"using":[73,148],"small":[74],"tiles.":[76],"In":[77],"work,":[79,114],"we":[80],"extend":[81],"adapt":[84],"easily":[85],"different":[87],"logic":[89,104,109,122,136,151],"families,":[90,105],"(1)":[92],"modifying":[93],"device":[95],"access":[96],"support":[99],"a":[100,120],"wide":[101],"range":[102],"(2)":[106],"evaluating":[107,119],"three":[108],"families":[110],"proposed":[111],"prior":[113],"(3)":[116],"new":[121],"family":[123],"called":[124],"OSCAR":[125,150],"that":[126,143],"significantly":[127],"relaxes":[128],"switching":[130],"voltage":[131],"constraints":[132],"required":[133],"perform":[135],"with":[137],"resistive":[138],"devices.":[140],"We":[141],"show":[142],"modified":[145],"architecture,":[147],"family,":[152],"practical":[155],"on":[157],"real":[158],"ReRAM":[159],"devices":[160],"while":[161],"improving":[162],"energy":[165],"savings":[166],"30%":[168],"37%,":[170],"respectively,":[171],"over":[172],"original":[174],"work.":[176]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
