{"id":"https://openalex.org/W2808603160","doi":"https://doi.org/10.1109/jetcas.2018.2847600","title":"Post-P&R Performance and Power Analysis for RRAM-Based FPGAs","display_name":"Post-P&R Performance and Power Analysis for RRAM-Based FPGAs","publication_year":2018,"publication_date":"2018-06-14","ids":{"openalex":"https://openalex.org/W2808603160","doi":"https://doi.org/10.1109/jetcas.2018.2847600","mag":"2808603160"},"language":"en","primary_location":{"id":"doi:10.1109/jetcas.2018.2847600","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jetcas.2018.2847600","pdf_url":null,"source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/256225","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103004961","display_name":"Xifan Tang","orcid":"https://orcid.org/0000-0003-2203-3981"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xifan Tang","raw_affiliation_strings":["Laboratory for NanoIntegrated Systems, The University of Utah, Salt Lake City, UT, USA"],"affiliations":[{"raw_affiliation_string":"Laboratory for NanoIntegrated Systems, The University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055536889","display_name":"Edouard Giacomin","orcid":"https://orcid.org/0000-0002-5415-1870"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edouard Giacomin","raw_affiliation_strings":["Laboratory for NanoIntegrated Systems, The University of Utah, Salt Lake City, UT, USA"],"affiliations":[{"raw_affiliation_string":"Laboratory for NanoIntegrated Systems, The University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072927296","display_name":"Giovanni De Micheli","orcid":"https://orcid.org/0000-0002-7827-3215"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Giovanni De Micheli","raw_affiliation_strings":["Integrated Systems Laboratory, School of Computer and Communication Sciences, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland"],"affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory, School of Computer and Communication Sciences, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002568331","display_name":"Pierre\u2010Emmanuel Gaillardon","orcid":"https://orcid.org/0000-0003-3634-3999"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pierre-Emmanuel Gaillardon","raw_affiliation_strings":["Laboratory for NanoIntegrated Systems, The University of Utah, Salt Lake City, UT, USA"],"affiliations":[{"raw_affiliation_string":"Laboratory for NanoIntegrated Systems, The University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5103004961"],"corresponding_institution_ids":["https://openalex.org/I223532165"],"apc_list":null,"apc_paid":null,"fwci":0.6438,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.7051371,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"8","issue":"3","first_page":"639","last_page":"650"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.903657078742981},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.821664571762085},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8200576305389404},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6195492744445801},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5098985433578491},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4714948534965515},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.41923412680625916},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4144645929336548},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40872934460639954},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35679852962493896},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30671077966690063},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23433461785316467},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22390544414520264},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.19004401564598083}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.903657078742981},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.821664571762085},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8200576305389404},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6195492744445801},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5098985433578491},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4714948534965515},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.41923412680625916},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4144645929336548},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40872934460639954},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35679852962493896},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30671077966690063},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23433461785316467},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22390544414520264},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19004401564598083},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jetcas.2018.2847600","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jetcas.2018.2847600","pdf_url":null,"source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:infoscience.epfl.ch:256225","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/256225","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"research article"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:256225","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/256225","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"research article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G456446722","display_name":null,"funder_award_id":"FA8650-18-2-7855","funder_id":"https://openalex.org/F4320338294","funder_display_name":"Air Force Research Laboratory"},{"id":"https://openalex.org/G5649888554","display_name":null,"funder_award_id":"FA8650-18-2-7855","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"},{"id":"https://openalex.org/G6748573657","display_name":null,"funder_award_id":"200021-146600","funder_id":"https://openalex.org/F4320320924","funder_display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung"},{"id":"https://openalex.org/G8761213343","display_name":null,"funder_award_id":"2016016","funder_id":"https://openalex.org/F4320320950","funder_display_name":"United States-Israel Binational Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320320924","display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung","ror":"https://ror.org/00yjd3n13"},{"id":"https://openalex.org/F4320320950","display_name":"United States-Israel Binational Science Foundation","ror":"https://ror.org/00j8z2m73"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"},{"id":"https://openalex.org/F4320338294","display_name":"Air Force Research Laboratory","ror":"https://ror.org/02e2egq70"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":56,"referenced_works":["https://openalex.org/W1480183640","https://openalex.org/W1523051745","https://openalex.org/W1641127476","https://openalex.org/W1669114967","https://openalex.org/W1701908161","https://openalex.org/W1967128905","https://openalex.org/W1971000062","https://openalex.org/W1987760418","https://openalex.org/W2004823737","https://openalex.org/W2006798699","https://openalex.org/W2019965721","https://openalex.org/W2030765577","https://openalex.org/W2049121968","https://openalex.org/W2051736202","https://openalex.org/W2077066011","https://openalex.org/W2078177817","https://openalex.org/W2086709250","https://openalex.org/W2089090392","https://openalex.org/W2092386722","https://openalex.org/W2095558812","https://openalex.org/W2118995854","https://openalex.org/W2120544688","https://openalex.org/W2125469204","https://openalex.org/W2128473621","https://openalex.org/W2136983830","https://openalex.org/W2138383740","https://openalex.org/W2138840350","https://openalex.org/W2139911369","https://openalex.org/W2141248063","https://openalex.org/W2146437820","https://openalex.org/W2150528147","https://openalex.org/W2163114555","https://openalex.org/W2263042501","https://openalex.org/W2290984771","https://openalex.org/W2342821294","https://openalex.org/W2524902150","https://openalex.org/W2541405868","https://openalex.org/W2566594221","https://openalex.org/W2598280270","https://openalex.org/W2613883010","https://openalex.org/W2789785996","https://openalex.org/W3003587919","https://openalex.org/W4214686615","https://openalex.org/W6628664065","https://openalex.org/W6637097397","https://openalex.org/W6637453286","https://openalex.org/W6642035544","https://openalex.org/W6663067102","https://openalex.org/W6678466197","https://openalex.org/W6681989696","https://openalex.org/W6696783599","https://openalex.org/W6703950265","https://openalex.org/W6727420705","https://openalex.org/W6737622086","https://openalex.org/W6748918466","https://openalex.org/W7054665252"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W1928481607","https://openalex.org/W3195722497","https://openalex.org/W1980301972","https://openalex.org/W2167784970","https://openalex.org/W2387264083","https://openalex.org/W2604877941","https://openalex.org/W2390885485"],"abstract_inverted_index":{"Resistive":[0],"random":[1,45],"access":[2,46],"memory":[3,47],"(RRAM)-based":[4],"FPGAs":[5,11,91,147,228,251,279,286,303],"are":[6,69,165,176,304],"predicted":[7],"to":[8,120,152,235,255,273,290],"outperform":[9,288],"conventional":[10,84],"architectures":[12],"in":[13,35,53,63,257,262,268,293],"area,":[14,258],"delay,":[15],"and":[16,49,116,124,129,145,148,159,172,194,264,310],"power":[17,125,204],"over":[18,239],"a":[19,43,50,54,138,179,185,300],"wide":[20],"range":[21],"of":[22,42,59,66,170,226,307],"voltage":[23],"operations,":[24],"allowing":[25],"novel":[26],"energy-quality":[27],"tradeoffs":[28],"for":[29,83,142],"reconfigurable":[30],"computing.":[31],"The":[32,162,203],"opportunity":[33],"lies":[34],"that":[36,222,245],"RRAMs":[37],"can":[38,252,287],"realize":[39],"the":[40,64,67,214,223,313],"functionality":[41],"static":[44],"(SRAM)":[48],"transmission":[51],"gate":[52],"unique":[55],"device.":[56],"However,":[57],"most":[58,154],"predictive":[60],"analyses":[61,164],"shown":[62],"state":[65],"art":[68],"achieved":[70],"by":[71,103,178,212],"using":[72,104],"analytical":[73,77,106,201],"models.":[74,107,202],"Unfortunately,":[75],"while":[76],"models":[78],"have":[79],"been":[80,94],"intensively":[81],"refined":[82],"FPGA":[85,160,187],"architectures,":[86],"their":[87],"accuracy":[88],"on":[89,113,167,208,259,265],"RRAM-based":[90,130,146,157,173,227,250,285,302],"has":[92],"not":[93],"carefully":[95],"investigated.":[96],"Consequently,":[97],"misleading":[98],"conclusions":[99],"may":[100],"be":[101,230],"caused":[102],"inaccurate":[105],"In":[108],"this":[109],"paper,":[110],"we":[111,136],"rely":[112],"electrical":[114],"simulations":[115],"semi-custom":[117,180],"design":[118,181],"tools":[119],"perform":[121],"detailed":[122],"area":[123,163],"comparison":[126],"between":[127],"SRAM-based":[128,144,171,240,274,278,314],"FPGAs.":[131,241],"To":[132],"enable":[133],"accurate":[134],"analysis,":[135],"develop":[137],"synthesizable":[139],"Verilog":[140],"generator":[141],"both":[143],"also":[149],"enhance":[150],"FPGA-SPICE":[151],"support":[153],"recent":[155],"advanced":[156],"circuits":[158],"architectures.":[161],"based":[166,207],"full-chip":[168],"layouts":[169],"FPGAs,":[174],"which":[175,196],"produced":[177],"flow.":[182],"We":[183],"consider":[184],"full":[186],"fabric,":[188],"including":[189],"core":[190],"logic,":[191],"configuring":[192],"peripherals,":[193],"I/Os,":[195],"is":[197,206],"more":[198,305],"realistic":[199],"than":[200,312],"analysis":[205],"SPICE":[209],"simulation":[210],"results":[211,220,243],"considering":[213],"20":[215,233],"largest":[216],"MCNC":[217],"benchmarks.":[218],"Simulation":[219],"identify":[221],"target":[224],"RHRS":[225],"should":[229],"at":[231,246,281],"least":[232],"MQ":[234],"guarantee":[236],"energy":[237,309],"improvements":[238],"Experimental":[242],"present":[244],"nominal":[247,282],"working":[248,280],"voltage,":[249,283],"improve":[253],"up":[254],"8%":[256],"average":[260,266],"22%":[261],"delay":[263,297],"16%":[267],"power,":[269],"respectively,":[270],"as":[271],"compared":[272],"counterparts.":[275,315],"Compared":[276],"with":[277],"near-Vt":[284],"close":[289],"two":[291],"times":[292],"energy-delay":[294],"product":[295],"without":[296],"overhead.":[298],"As":[299],"result,":[301],"capable":[306],"trading-off":[308],"quality":[311]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2020,"cited_by_count":3},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}