{"id":"https://openalex.org/W573249552","doi":"https://doi.org/10.1109/jetcas.2015.2426497","title":"Device Requirements and Technology-Driven Architecture Optimization for Analog Neurocomputing","display_name":"Device Requirements and Technology-Driven Architecture Optimization for Analog Neurocomputing","publication_year":2015,"publication_date":"2015-05-07","ids":{"openalex":"https://openalex.org/W573249552","doi":"https://doi.org/10.1109/jetcas.2015.2426497","mag":"573249552"},"language":"en","primary_location":{"id":"doi:10.1109/jetcas.2015.2426497","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jetcas.2015.2426497","pdf_url":null,"source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029852609","display_name":"Vehbi Calayir","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vehbi Calayir","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","Department of Electrical and Computer Engineering Carnegie Mellon University Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering Carnegie Mellon University Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033242808","display_name":"Larry Pileggi","orcid":"https://orcid.org/0000-0002-8605-8240"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Larry Pileggi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","Department of Electrical and Computer Engineering Carnegie Mellon University Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering Carnegie Mellon University Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I74973139"],"apc_list":null,"apc_paid":null,"fwci":0.5831,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.69912246,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"5","issue":"2","first_page":"162","last_page":"172"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5681385397911072},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49689486622810364},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4775429666042328},{"id":"https://openalex.org/keywords/analog-computer","display_name":"Analog computer","score":0.41531726717948914},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33232036232948303},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.32448557019233704},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.304917573928833}],"concepts":[{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5681385397911072},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49689486622810364},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4775429666042328},{"id":"https://openalex.org/C90915687","wikidata":"https://www.wikidata.org/wiki/Q63759","display_name":"Analog computer","level":2,"score":0.41531726717948914},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33232036232948303},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.32448557019233704},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.304917573928833},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jetcas.2015.2426497","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jetcas.2015.2426497","pdf_url":null,"source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":48,"referenced_works":["https://openalex.org/W750576378","https://openalex.org/W1809705255","https://openalex.org/W1964529921","https://openalex.org/W1977645040","https://openalex.org/W1981058168","https://openalex.org/W1990306796","https://openalex.org/W2008284671","https://openalex.org/W2010199012","https://openalex.org/W2010473643","https://openalex.org/W2018154336","https://openalex.org/W2034761325","https://openalex.org/W2039375332","https://openalex.org/W2048012309","https://openalex.org/W2056717940","https://openalex.org/W2057707608","https://openalex.org/W2058519952","https://openalex.org/W2058593581","https://openalex.org/W2066879155","https://openalex.org/W2067829054","https://openalex.org/W2069178283","https://openalex.org/W2071510979","https://openalex.org/W2075462258","https://openalex.org/W2077116387","https://openalex.org/W2080625874","https://openalex.org/W2086702214","https://openalex.org/W2088716787","https://openalex.org/W2088797290","https://openalex.org/W2096445739","https://openalex.org/W2101925294","https://openalex.org/W2102624141","https://openalex.org/W2104819929","https://openalex.org/W2105533736","https://openalex.org/W2111162116","https://openalex.org/W2120557145","https://openalex.org/W2131763976","https://openalex.org/W2143165843","https://openalex.org/W2143378405","https://openalex.org/W2158729912","https://openalex.org/W2164853001","https://openalex.org/W2171376220","https://openalex.org/W2246305345","https://openalex.org/W2334364695","https://openalex.org/W2578507560","https://openalex.org/W3100500103","https://openalex.org/W3143740944","https://openalex.org/W6635732093","https://openalex.org/W6679951043","https://openalex.org/W6691068689"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2054763705","https://openalex.org/W2080135771","https://openalex.org/W2588198209","https://openalex.org/W867721084","https://openalex.org/W1909006023","https://openalex.org/W4205824991","https://openalex.org/W3200723557","https://openalex.org/W4312713546","https://openalex.org/W2038503502"],"abstract_inverted_index":{"Neurocomputers":[0],"offer":[1],"a":[2,85,115],"massively":[3],"parallel":[4],"computing":[5,28],"paradigm":[6],"by":[7],"mimicking":[8],"the":[9,64,101,136],"human":[10],"brain.":[11],"Their":[12],"efficient":[13,140],"use":[14,65],"in":[15],"statistical":[16],"information":[17],"processing":[18],"has":[19],"been":[20],"proposed":[21,75],"to":[22,62,90],"overcome":[23],"critical":[24],"bottlenecks":[25],"with":[26],"traditional":[27],"schemes":[29],"for":[30,110,117],"applications":[31],"such":[32,56,111],"as":[33],"image":[34],"and":[35,38,45,58,87,108,113,120,141],"speech":[36],"processing,":[37],"associative":[39],"memory.":[40],"However,":[41],"large":[42],"power":[43],"consumption":[44],"high":[46],"circuit":[47],"complexity":[48],"of":[49,55,66,104,106,131,138],"CMOS-based":[50],"implementations":[51],"have":[52,59,82],"precluded":[53],"adoption":[54],"systems,":[57,112],"led":[60],"researchers":[61],"explore":[63,100],"emerging":[67,80],"technologies.":[68],"Although":[69],"they":[70],"provide":[71],"intriguing":[72],"properties,":[73],"previously":[74],"neurocomputing":[76,145],"components":[77],"based":[78],"on":[79],"technologies":[81],"not":[83],"offered":[84],"complete":[86],"practical":[88],"solution":[89],"efficiently":[91],"construct":[92],"an":[93,139],"entire":[94],"system.":[95,146],"In":[96],"this":[97],"paper":[98],"we":[99],"generalized":[102],"problem":[103],"co-optimization":[105],"technology":[107],"architecture":[109],"develop":[114],"recipe":[116],"device":[118],"requirements":[119],"target":[121],"capabilities.":[122],"We":[123],"describe":[124],"two":[125],"plausible":[126],"case":[127],"study":[128],"examples,":[129],"each":[130],"which":[132],"could":[133],"potentially":[134],"enable":[135],"implementation":[137],"fully":[142],"functional":[143],"analog":[144]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}