{"id":"https://openalex.org/W2158622216","doi":"https://doi.org/10.1109/jetcas.2011.2162159","title":"Benchmarking of Standard-Cell Based Memories in the Sub-$V_{\\rm T}$ Domain in 65-nm CMOS Technology","display_name":"Benchmarking of Standard-Cell Based Memories in the Sub-$V_{\\rm T}$ Domain in 65-nm CMOS Technology","publication_year":2011,"publication_date":"2011-06-01","ids":{"openalex":"https://openalex.org/W2158622216","doi":"https://doi.org/10.1109/jetcas.2011.2162159","mag":"2158622216"},"language":"en","primary_location":{"id":"doi:10.1109/jetcas.2011.2162159","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jetcas.2011.2162159","pdf_url":null,"source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/178151","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026324911","display_name":"Pascal Meinerzhagen","orcid":"https://orcid.org/0000-0002-5444-5772"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Pascal Meinerzhagen","raw_affiliation_strings":["Institute of Electrical Engineering, Swiss Federal Institute of Technology, Lausanne, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electrical Engineering, Swiss Federal Institute of Technology, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111976887","display_name":"S. M. Yasser Sherazi","orcid":null},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"S. M. Yasser Sherazi","raw_affiliation_strings":["Department of Electrical and Information Technology, Lund University, Lund, Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Information Technology, Lund University, Lund, Sweden","institution_ids":["https://openalex.org/I187531555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059133771","display_name":"Andreas Burg","orcid":"https://orcid.org/0000-0002-7270-5558"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Andreas Burg","raw_affiliation_strings":["Institute of Electrical Engineering, Swiss Federal Institute of Technology, Lausanne, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electrical Engineering, Swiss Federal Institute of Technology, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5104061156","display_name":"Joachim Rodrigues","orcid":null},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Joachim Neves Rodrigues","raw_affiliation_strings":["Department of Electrical and Information Technology, Lund University, Lund, Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Information Technology, Lund University, Lund, Sweden","institution_ids":["https://openalex.org/I187531555"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.8579,"has_fulltext":false,"cited_by_count":69,"citation_normalized_percentile":{"value":0.96501631,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"1","issue":"2","first_page":"173","last_page":"182"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5289934873580933},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5244277119636536},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.433951735496521},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4143350124359131},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3528047204017639},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24629926681518555},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1945887804031372},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15544486045837402},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09983175992965698}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5289934873580933},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5244277119636536},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.433951735496521},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4143350124359131},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3528047204017639},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24629926681518555},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1945887804031372},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15544486045837402},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09983175992965698},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/jetcas.2011.2162159","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jetcas.2011.2162159","pdf_url":null,"source":{"id":"https://openalex.org/S142323794","display_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","issn_l":"2156-3357","issn":["2156-3357","2156-3365"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:infoscience.epfl.ch:178151","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/178151","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},{"id":"pmh:oai:lup.lub.lu.se:7cc276fe-f487-44a4-a8d1-5aa7f6fc0c4b","is_oa":false,"landing_page_url":"https://lup.lub.lu.se/record/2026612","pdf_url":null,"source":{"id":"https://openalex.org/S4306400536","display_name":"Lund University Publications (Lund University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I187531555","host_organization_name":"Lund University","host_organization_lineage":["https://openalex.org/I187531555"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN: 2156-3365","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:178151","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/178151","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.800000011920929,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1000572307","display_name":"Circuits and Systems for Next Generation Wireless Communication","funder_award_id":"119057","funder_id":"https://openalex.org/F4320320924","funder_display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung"},{"id":"https://openalex.org/G6187700389","display_name":null,"funder_award_id":"PP002-119057","funder_id":"https://openalex.org/F4320320924","funder_display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320320924","display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung","ror":"https://ror.org/00yjd3n13"},{"id":"https://openalex.org/F4320320940","display_name":"Stiftelsen f\u00f6r\u00a0Strategisk Forskning","ror":"https://ror.org/044wr7g58"},{"id":"https://openalex.org/F4320321030","display_name":"VINNOVA","ror":"https://ror.org/01kd5m353"},{"id":"https://openalex.org/F4320321806","display_name":"Lunds Universitet","ror":"https://ror.org/012a77v79"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W275470402","https://openalex.org/W1575022128","https://openalex.org/W1967171495","https://openalex.org/W1977203608","https://openalex.org/W1997274586","https://openalex.org/W1998597557","https://openalex.org/W2017195664","https://openalex.org/W2078297980","https://openalex.org/W2079163915","https://openalex.org/W2094419697","https://openalex.org/W2097825079","https://openalex.org/W2098931949","https://openalex.org/W2106837243","https://openalex.org/W2108312065","https://openalex.org/W2109710637","https://openalex.org/W2119520935","https://openalex.org/W2119733520","https://openalex.org/W2127190809","https://openalex.org/W2131833150","https://openalex.org/W2144289559","https://openalex.org/W2155827627","https://openalex.org/W2159448561","https://openalex.org/W3144038827","https://openalex.org/W4253227026","https://openalex.org/W6654702436"],"related_works":["https://openalex.org/W160116885","https://openalex.org/W2059929079","https://openalex.org/W2625512991","https://openalex.org/W2526884355","https://openalex.org/W2011083790","https://openalex.org/W2950363298","https://openalex.org/W2041947271","https://openalex.org/W2477853911","https://openalex.org/W1967383368","https://openalex.org/W2322403445"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"standard-cell":[3],"based":[4],"memories":[5],"(SCMs)":[6],"are":[7,56,131],"proposed":[8],"as":[9,35,37],"an":[10],"alternative":[11],"to":[12,133],"full-custom":[13],"sub-":[14,44,63,135],"<i":[15,45,64,136],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[16,19,46,49,65,68,137,140],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">V</i>":[17,47,66,138],"<sub":[18,48,67,139],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">T</sub>":[20,50,69,141],"SRAM":[21,142],"macros":[22],"for":[23],"ultra-low-power":[24],"systems":[25],"requiring":[26],"small":[27],"memory":[28,33,118],"blocks.":[29],"The":[30,83],"energy":[31,116],"per":[32,117],"access":[34],"well":[36],"the":[38,43,87,91,115,120,124,127],"maximum":[39],"achievable":[40,121],"throughput":[41],"in":[42,95],"domain":[51],"of":[52,60,90,109,126],"various":[53,92],"SCM":[54,93,129],"architectures":[55,94],"evaluated":[57],"by":[58,107],"means":[59,108],"a":[61,96],"gate-level":[62],"characterization":[70],"model,":[71],"building":[72],"on":[73],"data":[74],"extracted":[75],"from":[76],"fully":[77],"placed,":[78],"routed,":[79],"and":[80,123],"back-annotated":[81],"netlists.":[82],"reliable":[84],"operation":[85],"at":[86],"energy-minimum":[88],"voltage":[89],"65-nm":[97],"CMOS":[98],"technology":[99],"considering":[100],"within-die":[101],"process":[102],"parameter":[103],"variations":[104],"is":[105],"demonstrated":[106],"Monte":[110],"Carlo":[111],"circuit":[112],"simulation.":[113],"Finally,":[114],"access,":[119],"throughput,":[122],"area":[125],"best":[128],"architecture":[130],"compared":[132],"recent":[134],"designs.":[143]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":13},{"year":2016,"cited_by_count":9},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":8}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}
