{"id":"https://openalex.org/W4234851795","doi":"https://doi.org/10.1109/iwsoc.2004.1319897","title":"A field programmable bit-serial digital signal processor","display_name":"A field programmable bit-serial digital signal processor","publication_year":2004,"publication_date":"2004-09-28","ids":{"openalex":"https://openalex.org/W4234851795","doi":"https://doi.org/10.1109/iwsoc.2004.1319897"},"language":"en","primary_location":{"id":"doi:10.1109/iwsoc.2004.1319897","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2004.1319897","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065685405","display_name":"S.A. Rahim","orcid":null},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"S.A. Rahim","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055122540","display_name":"L.E. Turner","orcid":null},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"L.E. Turner","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I168635309"],"apc_list":null,"apc_paid":null,"fwci":0.5188,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.62542339,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"295","last_page":"298"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.989300012588501,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9858999848365784,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7757048606872559},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.6231386065483093},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.6082770824432373},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.5234524607658386},{"id":"https://openalex.org/keywords/arithmetic-logic-unit","display_name":"Arithmetic logic unit","score":0.5159217119216919},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4797997772693634},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.44756758213043213},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.43702957034111023},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4356170892715454},{"id":"https://openalex.org/keywords/serial-communication","display_name":"Serial communication","score":0.4304669499397278},{"id":"https://openalex.org/keywords/digital-signal","display_name":"Digital signal","score":0.42390814423561096},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.4219053387641907},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3323851227760315},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08116301894187927}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7757048606872559},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.6231386065483093},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6082770824432373},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.5234524607658386},{"id":"https://openalex.org/C100276221","wikidata":"https://www.wikidata.org/wiki/Q192903","display_name":"Arithmetic logic unit","level":2,"score":0.5159217119216919},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4797997772693634},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.44756758213043213},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.43702957034111023},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4356170892715454},{"id":"https://openalex.org/C51707140","wikidata":"https://www.wikidata.org/wiki/Q518280","display_name":"Serial communication","level":2,"score":0.4304669499397278},{"id":"https://openalex.org/C52773712","wikidata":"https://www.wikidata.org/wiki/Q175022","display_name":"Digital signal","level":3,"score":0.42390814423561096},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.4219053387641907},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3323851227760315},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08116301894187927},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iwsoc.2004.1319897","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2004.1319897","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W1501488688","https://openalex.org/W1563585604"],"related_works":["https://openalex.org/W1556297113","https://openalex.org/W2365931855","https://openalex.org/W2113248871","https://openalex.org/W2244686501","https://openalex.org/W2322214226","https://openalex.org/W2067631125","https://openalex.org/W3143121479","https://openalex.org/W2374112065","https://openalex.org/W2993766674","https://openalex.org/W1989397700"],"abstract_inverted_index":{"The":[0,60,92,113],"field":[1],"programmable":[2,84,90,114,141],"digital":[3,79],"signal":[4,80,86],"processor":[5],"(FPDSP)":[6],"architecture":[7,62],"is":[8,63],"intended":[9],"to":[10,23,32,52,120,153],"allow":[11],"application":[12],"specific":[13],"DSP":[14],"filtering":[15],"at":[16],"moderate":[17],"sample":[18],"rates":[19],"where":[20],"the":[21,26,37,54,127,131,137,155,158],"ability":[22],"rapidly":[24],"modify":[25],"filter":[27,147],"characteristics":[28],"can":[29],"be":[30,40],"used":[31],"an":[33,66],"advantage.":[34],"Applications":[35],"that":[36],"FPDSP":[38],"will":[39],"best":[41],"suited":[42],"for":[43,130],"are":[44],"rapid":[45],"prototyping":[46],"of":[47,57,106,139,157],"filters,":[48],"audio":[49],"applications,":[50],"and":[51,89,102,108,124,151],"evaluate":[53],"potential":[55],"advantages":[56],"run-time":[58],"reconfiguration.":[59],"system":[61],"based":[64],"on":[65],"input":[67],"pipelined":[68],"least":[69],"significant":[70],"bit":[71],"first":[72],"bit-serial":[73,85,93,122],"two's":[74],"complement":[75],"arithmetic.":[76],"It":[77],"performs":[78],"processing":[81,87,94],"by":[82,104,110],"using":[83],"units":[88,95],"interconnect.":[91],"implement":[96],"simple":[97],"arithmetic":[98,132],"operations:":[99],"summation,":[100],"multiplication":[101,109],"division":[103],"powers":[105],"two,":[107],"negative":[111],"one.":[112],"unit":[115],"also":[116,125],"has":[117,148],"variable":[118],"bit-delays":[119],"time-align":[121],"words":[123],"generates":[126],"control":[128],"signals":[129],"operations":[133],"internally.":[134],"By":[135],"combining":[136],"functions":[138],"these":[140],"units,":[142],"a":[143],"2nd":[144],"order":[145],"recursive":[146],"been":[149],"built":[150],"tested":[152],"verify":[154],"functionality":[156],"FPDSP.":[159]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}