{"id":"https://openalex.org/W4235893237","doi":"https://doi.org/10.1109/iwsoc.2004.1319881","title":"Bit memory instructions for a general CPU","display_name":"Bit memory instructions for a general CPU","publication_year":2004,"publication_date":"2004-09-28","ids":{"openalex":"https://openalex.org/W4235893237","doi":"https://doi.org/10.1109/iwsoc.2004.1319881"},"language":"en","primary_location":{"id":"doi:10.1109/iwsoc.2004.1319881","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2004.1319881","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062696051","display_name":"M. Olausson","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"M. Olausson","raw_affiliation_strings":["Department of Electrical Engineering, Linkopings universitet, Linkoping, Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Linkopings universitet, Linkoping, Sweden","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020723619","display_name":"A. Edman","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"A. Edman","raw_affiliation_strings":["Department of Electrical Engineering, Linkopings universitet, Linkoping, Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Linkopings universitet, Linkoping, Sweden","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065714048","display_name":"D. Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"D. Liu","raw_affiliation_strings":["Department of Electrical Engineering, Linkopings universitet, Linkoping, Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Linkopings universitet, Linkoping, Sweden","institution_ids":["https://openalex.org/I102134673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I102134673"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.26596929,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"215","last_page":"218"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.902999997138977,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.902999997138977,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7890467643737793},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6784921288490295},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.6174173355102539},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5726866126060486},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.5252349376678467},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.4848533868789673},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4355596601963043},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4339819550514221},{"id":"https://openalex.org/keywords/16-bit","display_name":"16-bit","score":0.4141373932361603},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.40019091963768005},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.3989841938018799},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3949338495731354},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3689734935760498}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7890467643737793},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6784921288490295},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6174173355102539},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5726866126060486},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.5252349376678467},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.4848533868789673},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4355596601963043},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4339819550514221},{"id":"https://openalex.org/C33652231","wikidata":"https://www.wikidata.org/wiki/Q194368","display_name":"16-bit","level":2,"score":0.4141373932361603},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.40019091963768005},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.3989841938018799},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3949338495731354},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3689734935760498},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iwsoc.2004.1319881","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2004.1319881","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7599999904632568}],"awards":[],"funders":[{"id":"https://openalex.org/F4320337373","display_name":"Center for Information Technology","ror":"https://ror.org/03jh5a977"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W1844863970"],"related_works":["https://openalex.org/W4242495027","https://openalex.org/W2100773763","https://openalex.org/W2898989424","https://openalex.org/W4285257158","https://openalex.org/W2019238062","https://openalex.org/W2056436264","https://openalex.org/W1697439211","https://openalex.org/W919907138","https://openalex.org/W2742331047","https://openalex.org/W4293159259"],"abstract_inverted_index":{"Embedded":[0],"memories":[1,63],"in":[2],"an":[3,92],"application":[4],"specific":[5],"integrated":[6],"circuit":[7],"(ASIC)":[8],"consume":[9],"most":[10],"of":[11,17,33],"the":[12,74,87,97,100],"chip":[13],"area.":[14],"Data":[15],"variables":[16],"different":[18],"widths":[19],"require":[20],"more":[21],"memory":[22,101],"than":[23],"needed":[24],"because":[25],"they":[26],"are":[27,89],"rounded":[28],"up":[29],"to":[30,37,41,46],"nearest":[31],"power":[32],"2,":[34],"i.e.,":[35],"6":[36],"8":[38],"bits,":[39,43],"11":[40],"16":[42,68],"and":[44,59,76,91,99],"25":[45],"32":[47,70],"bits.":[48],"This":[49],"can":[50,64,78],"be":[51,66],"avoided":[52],"by":[53],"adding":[54],"two":[55],"bit":[56],"oriented":[57],"load":[58],"store":[60],"instructions.":[61],"The":[62,83],"still":[65],"8,":[67],"or":[69],"bits":[71],"wide,":[72],"but":[73],"loads":[75],"stores":[77],"have":[79],"arbitrary":[80],"variable":[81],"sizes.":[82],"hardware":[84,94],"changes":[85],"within":[86],"processor":[88,98],"small":[90],"extra":[93],"block":[95],"between":[96],"is":[102],"added.":[103]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
