{"id":"https://openalex.org/W2163565742","doi":"https://doi.org/10.1109/iwsoc.2003.1213052","title":"Design considerations for optically connected systems on chip","display_name":"Design considerations for optically connected systems on chip","publication_year":2004,"publication_date":"2004-04-23","ids":{"openalex":"https://openalex.org/W2163565742","doi":"https://doi.org/10.1109/iwsoc.2003.1213052","mag":"2163565742"},"language":"en","primary_location":{"id":"doi:10.1109/iwsoc.2003.1213052","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2003.1213052","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109037366","display_name":"Neal K. Bambha","orcid":null},"institutions":[{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N.K. Bambha","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Maryland, College Park, USA","University of Maryland at College Park, College Park, MD, US"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Maryland, College Park, USA","institution_ids":["https://openalex.org/I66946132"]},{"raw_affiliation_string":"University of Maryland at College Park, College Park, MD, US","institution_ids":["https://openalex.org/I66946132"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024736307","display_name":"Shuvra S. Battacharyya","orcid":null},"institutions":[{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.S. Battacharyya","raw_affiliation_strings":["Inst. for Adv. Comput. Studies, Univ. of Maryland, College Park, MD, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inst. for Adv. Comput. Studies, Univ. of Maryland, College Park, MD, USA","institution_ids":["https://openalex.org/I66946132"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041754212","display_name":"G. Euliss","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"G. Euliss","raw_affiliation_strings":["Applied Photonics, Inc. Fairfax, Fairfax, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Applied Photonics, Inc. Fairfax, Fairfax, VA, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.0683,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.87520997,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"299","last_page":"303"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10232","display_name":"Optical Network Technologies","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7048459053039551},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6828342080116272},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.6531063914299011},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5670754313468933},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5638934969902039},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5562140941619873},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5103387236595154},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47679567337036133},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.47228366136550903},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.43730881810188293},{"id":"https://openalex.org/keywords/systems-design","display_name":"Systems design","score":0.4224909245967865},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3941594958305359},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3277643322944641},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2847084701061249},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.20174658298492432},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19341892004013062},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.19015073776245117},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15297329425811768},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.09273236989974976}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7048459053039551},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6828342080116272},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.6531063914299011},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5670754313468933},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5638934969902039},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5562140941619873},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5103387236595154},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47679567337036133},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.47228366136550903},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.43730881810188293},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.4224909245967865},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3941594958305359},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3277643322944641},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2847084701061249},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.20174658298492432},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19341892004013062},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.19015073776245117},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15297329425811768},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.09273236989974976}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/iwsoc.2003.1213052","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2003.1213052","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:ADA457628","is_oa":false,"landing_page_url":"http://oai.dtic.mil/oai/oai?&amp;verb=getRecord&amp;metadataPrefix=html&amp;identifier=ADA457628","pdf_url":null,"source":{"id":"https://openalex.org/S4406923043","display_name":"Defense Technical Information Center (DTIC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"DTIC","raw_type":"Text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.15.238","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.15.238","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.umd.edu/DSPCAD/papers/bamb2003x1.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.976.9412","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.976.9412","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.dtic.mil/get-tr-doc/pdf?AD%3DADA457628%26Location%3DU2%26doc%3DGetTRDoc.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1978201463","https://openalex.org/W1985199772","https://openalex.org/W2033872646","https://openalex.org/W2097755092","https://openalex.org/W2104120376","https://openalex.org/W2107228596","https://openalex.org/W2138762319","https://openalex.org/W2170552821","https://openalex.org/W6675341906","https://openalex.org/W6684838212"],"related_works":["https://openalex.org/W2155019192","https://openalex.org/W2014709025","https://openalex.org/W4249035840","https://openalex.org/W2766970861","https://openalex.org/W2086397253","https://openalex.org/W2390348052","https://openalex.org/W3125341812","https://openalex.org/W1668171714","https://openalex.org/W2065566231","https://openalex.org/W4380607112"],"abstract_inverted_index":{"This":[0],"paper":[1],"addresses":[2],"some":[3],"fundamental":[4],"issues":[5],"relating":[6],"to":[7],"the":[8],"design":[9],"of":[10],"systems":[11],"on":[12],"chip":[13],"that":[14],"utilize":[15],"optical":[16],"interconnects.":[17],"We":[18],"present":[19],"an":[20],"information":[21],"theoretical":[22],"model":[23],"for":[24,44],"assessing":[25],"trade-offs":[26],"between":[27],"global":[28],"and":[29,35,40],"local":[30],"partitions":[31],"in":[32,50],"these":[33,51],"systems,":[34],"evaluate":[36],"interconnect":[37],"topology":[38],"synthesis":[39],"application":[41],"mapping":[42],"techniques":[43],"digital":[45],"signal":[46],"processing":[47],"(DSP)":[48],"applications":[49],"systems.":[52]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
