{"id":"https://openalex.org/W4247076204","doi":"https://doi.org/10.1109/iwsoc.2003.1213024","title":"Interfacing in microprocessor-based systems with a fast physical addressing","display_name":"Interfacing in microprocessor-based systems with a fast physical addressing","publication_year":2004,"publication_date":"2004-03-02","ids":{"openalex":"https://openalex.org/W4247076204","doi":"https://doi.org/10.1109/iwsoc.2003.1213024"},"language":"en","primary_location":{"id":"doi:10.1109/iwsoc.2003.1213024","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2003.1213024","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010300478","display_name":"Mountassar Maamoun","orcid":"https://orcid.org/0000-0003-1598-4500"},"institutions":[{"id":"https://openalex.org/I83332908","display_name":"University of Blida","ror":"https://ror.org/03g41pw14","country_code":"DZ","type":"education","lineage":["https://openalex.org/I83332908"]}],"countries":["DZ"],"is_corresponding":false,"raw_author_name":"M. Maamoun","raw_affiliation_strings":["Blida University, Burgas, Algeria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Blida University, Burgas, Algeria","institution_ids":["https://openalex.org/I83332908"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054884991","display_name":"A. Benbelkacem","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133935","display_name":"\u00c9cole Normale Sup\u00e9rieure de Kouba","ror":"https://ror.org/03kh2rb68","country_code":"DZ","type":"education","lineage":["https://openalex.org/I4210133935"]}],"countries":["DZ"],"is_corresponding":false,"raw_author_name":"A. Benbelkacem","raw_affiliation_strings":["LSIC Laboratory, Kouba, Algeria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSIC Laboratory, Kouba, Algeria","institution_ids":["https://openalex.org/I4210133935"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073600564","display_name":"D. Berkani","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"D. Berkani","raw_affiliation_strings":["Signal and Communications Laboratory, Algiers, Algeria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Signal and Communications Laboratory, Algiers, Algeria","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063571459","display_name":"A. Guessoum","orcid":null},"institutions":[{"id":"https://openalex.org/I83332908","display_name":"University of Blida","ror":"https://ror.org/03g41pw14","country_code":"DZ","type":"education","lineage":["https://openalex.org/I83332908"]}],"countries":["DZ"],"is_corresponding":false,"raw_author_name":"A. Guessoum","raw_affiliation_strings":["Blida University, Burgas, Algeria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Blida University, Burgas, Algeria","institution_ids":["https://openalex.org/I83332908"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.06,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.78517342,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"144","last_page":"149"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.9679681062698364},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.8621617555618286},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6996182799339294},{"id":"https://openalex.org/keywords/system-bus","display_name":"System bus","score":0.6850217580795288},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6635703444480896},{"id":"https://openalex.org/keywords/data-exchange","display_name":"Data exchange","score":0.5058560371398926},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.49775055050849915},{"id":"https://openalex.org/keywords/direct-memory-access","display_name":"Direct memory access","score":0.48984023928642273},{"id":"https://openalex.org/keywords/control-bus","display_name":"Control bus","score":0.4588530659675598},{"id":"https://openalex.org/keywords/back-side-bus","display_name":"Back-side bus","score":0.4506162405014038},{"id":"https://openalex.org/keywords/can-bus","display_name":"CAN bus","score":0.44493287801742554},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.43792349100112915},{"id":"https://openalex.org/keywords/local-bus","display_name":"Local bus","score":0.3973376750946045},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.28986358642578125},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.18149206042289734}],"concepts":[{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.9679681062698364},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.8621617555618286},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6996182799339294},{"id":"https://openalex.org/C136321198","wikidata":"https://www.wikidata.org/wiki/Q2377054","display_name":"System bus","level":2,"score":0.6850217580795288},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6635703444480896},{"id":"https://openalex.org/C15845906","wikidata":"https://www.wikidata.org/wiki/Q1172338","display_name":"Data exchange","level":2,"score":0.5058560371398926},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.49775055050849915},{"id":"https://openalex.org/C37724790","wikidata":"https://www.wikidata.org/wiki/Q210813","display_name":"Direct memory access","level":3,"score":0.48984023928642273},{"id":"https://openalex.org/C203315745","wikidata":"https://www.wikidata.org/wiki/Q2235486","display_name":"Control bus","level":3,"score":0.4588530659675598},{"id":"https://openalex.org/C121013533","wikidata":"https://www.wikidata.org/wiki/Q742323","display_name":"Back-side bus","level":5,"score":0.4506162405014038},{"id":"https://openalex.org/C201762086","wikidata":"https://www.wikidata.org/wiki/Q728183","display_name":"CAN bus","level":2,"score":0.44493287801742554},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.43792349100112915},{"id":"https://openalex.org/C202015219","wikidata":"https://www.wikidata.org/wiki/Q6664300","display_name":"Local bus","level":4,"score":0.3973376750946045},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.28986358642578125},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.18149206042289734},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C2776175482","wikidata":"https://www.wikidata.org/wiki/Q1195816","display_name":"Transfer (computing)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iwsoc.2003.1213024","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2003.1213024","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5600000023841858,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4244800129","https://openalex.org/W4255235451","https://openalex.org/W2404980846","https://openalex.org/W2026314975","https://openalex.org/W2387146226","https://openalex.org/W1494565374","https://openalex.org/W2383984117","https://openalex.org/W4212945793","https://openalex.org/W2781766703","https://openalex.org/W2386568907"],"abstract_inverted_index":{"This":[0,19,54],"work":[1],"develops":[2],"a":[3,76,82,137,153,156],"new":[4,45,138,148],"technique":[5,20,34],"for":[6],"interfacing":[7,26],"the":[8,12,16,22,33,41,44,49,60,66,73,89,93,96,102,116,119,129,133],"data":[9,52,97,154],"exchange":[10,98],"between":[11],"microprocessor-based":[13,67,90,111],"systems":[14],"and":[15,31,47,132,159],"external":[17,78,145],"devices.":[18],"exploits":[21],"great":[23],"capacity":[24],"of":[25,27,35,43,51,62,75,85,88,95,118,122,152],"Extended":[28,103],"Physical":[29,56,104],"Addressing":[30],"uses":[32],"Direct":[36],"Memory":[37],"Access":[38],"(DMA),":[39],"increases":[40],"frequency":[42],"bus":[46,130,149,158],"improves":[48],"speed":[50,99],"exchange.":[53],"Fast":[55],"Addressing,":[57],"based":[58],"on":[59],"use":[61,84],"software/hardware":[63],"system":[64,112,124],"in":[65,110,114],"system,":[68,131],"has":[69],"two":[70],"aims.":[71],"First,":[72],"management":[74],"large":[77],"memory":[79],"capacity,":[80],"with":[81],"reduced":[83],"physical":[86],"addresses":[87],"system.":[91],"Second,":[92],"increase":[94],"compared":[100],"to":[101,128,143],"Addressing.":[105],"While":[106],"using":[107],"this":[108],"architecture":[109],"or":[113],"computer,":[115],"input":[117],"hardware":[120],"part":[121],"our":[123],"will":[125,140],"be":[126,141],"connected":[127,142],"output,":[134],"which":[135],"is":[136,150],"bus,":[139,155],"an":[144,160],"device.":[146],"The":[147],"composed":[151],"control":[157],"address":[161],"bus.":[162]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
