{"id":"https://openalex.org/W2159103767","doi":"https://doi.org/10.1109/iwsoc.2003.1213019","title":"Reconfigurable digital instrumentation based on FPGA","display_name":"Reconfigurable digital instrumentation based on FPGA","publication_year":2004,"publication_date":"2004-03-01","ids":{"openalex":"https://openalex.org/W2159103767","doi":"https://doi.org/10.1109/iwsoc.2003.1213019","mag":"2159103767"},"language":"en","primary_location":{"id":"doi:10.1109/iwsoc.2003.1213019","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2003.1213019","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011270825","display_name":"Giuseppe Costantino Giaconia","orcid":"https://orcid.org/0000-0003-2457-0772"},"institutions":[{"id":"https://openalex.org/I900890020","display_name":"University of Palermo","ror":"https://ror.org/044k9ta02","country_code":"IT","type":"education","lineage":["https://openalex.org/I900890020"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"C. Giaconia","raw_affiliation_strings":["Department of Electrical Engineering, University of Palermo, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Palermo, Italy","institution_ids":["https://openalex.org/I900890020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103212576","display_name":"A. Di Stefano","orcid":"https://orcid.org/0000-0002-5713-1349"},"institutions":[{"id":"https://openalex.org/I900890020","display_name":"University of Palermo","ror":"https://ror.org/044k9ta02","country_code":"IT","type":"education","lineage":["https://openalex.org/I900890020"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"A. Di Stefano","raw_affiliation_strings":["Department of Electrical Engineering, University of Palermo, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Palermo, Italy","institution_ids":["https://openalex.org/I900890020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008762072","display_name":"G. Capponi","orcid":null},"institutions":[{"id":"https://openalex.org/I900890020","display_name":"University of Palermo","ror":"https://ror.org/044k9ta02","country_code":"IT","type":"education","lineage":["https://openalex.org/I900890020"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"G. Capponi","raw_affiliation_strings":["Department of Electrical Engineering, University of Palermo, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Palermo, Italy","institution_ids":["https://openalex.org/I900890020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I900890020"],"apc_list":null,"apc_paid":null,"fwci":0.4886,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.6249888,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"81","issue":null,"first_page":"120","last_page":"122"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.9834462404251099},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.925307035446167},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.66090989112854},{"id":"https://openalex.org/keywords/instrumentation","display_name":"Instrumentation (computer programming)","score":0.6597273945808411},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.64938884973526},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5073015093803406},{"id":"https://openalex.org/keywords/automatic-test-equipment","display_name":"Automatic test equipment","score":0.501488447189331},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.48787522315979004},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.41825875639915466},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4108569324016571},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21515727043151855},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.10021933913230896},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07601535320281982},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07024326920509338}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.9834462404251099},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.925307035446167},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.66090989112854},{"id":"https://openalex.org/C118530786","wikidata":"https://www.wikidata.org/wiki/Q1134732","display_name":"Instrumentation (computer programming)","level":2,"score":0.6597273945808411},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.64938884973526},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5073015093803406},{"id":"https://openalex.org/C141842801","wikidata":"https://www.wikidata.org/wiki/Q363815","display_name":"Automatic test equipment","level":3,"score":0.501488447189331},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.48787522315979004},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.41825875639915466},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4108569324016571},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21515727043151855},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.10021933913230896},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07601535320281982},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07024326920509338},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iwsoc.2003.1213019","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwsoc.2003.1213019","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.unipa.it:10447/55864","is_oa":false,"landing_page_url":"http://hdl.handle.net/10447/55864","pdf_url":null,"source":{"id":"https://openalex.org/S4306401065","display_name":"Nova Science Publishers (Nova Science Publishers, Inc.)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.5}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2068041061","https://openalex.org/W2126255765","https://openalex.org/W2156735174","https://openalex.org/W2764768456"],"related_works":["https://openalex.org/W3103981520","https://openalex.org/W200972441","https://openalex.org/W2038220260","https://openalex.org/W1857140530","https://openalex.org/W1545578515","https://openalex.org/W1544665014","https://openalex.org/W2098458348","https://openalex.org/W2150194641","https://openalex.org/W2128620931","https://openalex.org/W3166559827"],"abstract_inverted_index":{"A":[0],"novel":[1],"application":[2],"of":[3,15,19],"FPGA":[4],"to":[5],"realize":[6],"digital":[7],"test":[8,25],"equipment":[9],"is":[10],"proposed.":[11],"It":[12],"takes":[13],"advantage":[14],"the":[16,28],"dynamic":[17],"reconfigurability":[18],"FPGAs":[20],"so":[21],"easily":[22],"tailoring":[23],"custom":[24],"functions":[26],"in":[27,33],"same":[29],"instrument.":[30],"This":[31],"results":[32],"high":[34],"effective,":[35],"compact":[36],"and":[37],"low":[38],"cost":[39],"instruments.":[40]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2016-06-24T00:00:00"}
