{"id":"https://openalex.org/W2166344060","doi":"https://doi.org/10.1109/iwrsp.2003.1207043","title":"An instruction throughput model of superscalar processors","display_name":"An instruction throughput model of superscalar processors","publication_year":2004,"publication_date":"2004-01-24","ids":{"openalex":"https://openalex.org/W2166344060","doi":"https://doi.org/10.1109/iwrsp.2003.1207043","mag":"2166344060"},"language":"en","primary_location":{"id":"doi:10.1109/iwrsp.2003.1207043","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwrsp.2003.1207043","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"14th IEEE International Workshop on Rapid Systems Prototyping, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110220037","display_name":"T.M. Taha","orcid":null},"institutions":[{"id":"https://openalex.org/I8078737","display_name":"Clemson University","ror":"https://ror.org/037s24f05","country_code":"US","type":"education","lineage":["https://openalex.org/I8078737"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T.M. Taha","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Clemson University, Clemson, SC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Clemson University, Clemson, SC, USA","institution_ids":["https://openalex.org/I8078737"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112205650","display_name":"D.S. Wills","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.S. Wills","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"e82a","issue":null,"first_page":"156","last_page":"163"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9908000230789185,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8126571774482727},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.7523448467254639},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6304974555969238},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5918301343917847},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5906293392181396},{"id":"https://openalex.org/keywords/superscalar","display_name":"Superscalar","score":0.5777996778488159},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5316140055656433},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.5267526507377625},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.49855732917785645},{"id":"https://openalex.org/keywords/limiting","display_name":"Limiting","score":0.48935431241989136},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.43152034282684326},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35795363783836365},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2752766013145447},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12371182441711426},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.07285058498382568},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07122275233268738}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8126571774482727},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.7523448467254639},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6304974555969238},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5918301343917847},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5906293392181396},{"id":"https://openalex.org/C147101560","wikidata":"https://www.wikidata.org/wiki/Q1045706","display_name":"Superscalar","level":2,"score":0.5777996778488159},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5316140055656433},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.5267526507377625},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.49855732917785645},{"id":"https://openalex.org/C188198153","wikidata":"https://www.wikidata.org/wiki/Q1613840","display_name":"Limiting","level":2,"score":0.48935431241989136},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.43152034282684326},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35795363783836365},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2752766013145447},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12371182441711426},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.07285058498382568},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07122275233268738},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iwrsp.2003.1207043","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iwrsp.2003.1207043","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"14th IEEE International Workshop on Rapid Systems Prototyping, 2003. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.115.8463","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.115.8463","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://users.ece.gatech.edu/~scotty/pdf/Taha03-RSP.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W336090841","https://openalex.org/W413031438","https://openalex.org/W1978067744","https://openalex.org/W1991222965","https://openalex.org/W2008190628","https://openalex.org/W2032094184","https://openalex.org/W2068713803","https://openalex.org/W2073617099","https://openalex.org/W2095932038","https://openalex.org/W2096858484","https://openalex.org/W2101890501","https://openalex.org/W2104225326","https://openalex.org/W2107068041","https://openalex.org/W2108697247","https://openalex.org/W2112686638","https://openalex.org/W2123037616","https://openalex.org/W2130836267","https://openalex.org/W2131771876","https://openalex.org/W2134032953","https://openalex.org/W2137583141","https://openalex.org/W2139350452","https://openalex.org/W2145954193","https://openalex.org/W2149780082","https://openalex.org/W2154693467","https://openalex.org/W2156002710","https://openalex.org/W2158561130","https://openalex.org/W2159441376","https://openalex.org/W2161864047","https://openalex.org/W2163255067","https://openalex.org/W2163290010","https://openalex.org/W2166410708","https://openalex.org/W2179730127","https://openalex.org/W2243964973","https://openalex.org/W2515132592","https://openalex.org/W4251200524","https://openalex.org/W6683885505","https://openalex.org/W6726090099"],"related_works":["https://openalex.org/W1521960115","https://openalex.org/W2230270457","https://openalex.org/W613182605","https://openalex.org/W2544364117","https://openalex.org/W2145523143","https://openalex.org/W1916582918","https://openalex.org/W4386869637","https://openalex.org/W2225963097","https://openalex.org/W2087838646","https://openalex.org/W2562747857"],"abstract_inverted_index":{"With":[0],"advances":[1],"in":[2,76],"semiconductor":[3],"technology,":[4],"processors":[5,140],"are":[6,44],"becoming":[7],"larger":[8],"and":[9,21,59,147],"more":[10,24],"complex.":[11],"Future":[12],"processor":[13],"designers":[14],"will":[15],"face":[16],"an":[17],"enormous":[18],"design":[19,26,53,57,86,94,100,125],"space,":[20],"must":[22],"evaluate":[23],"architecture":[25,85,124,146],"points":[27],"to":[28,61,120],"reach":[29],"a":[30,49,80,98,112,142,154],"final":[31,123],"optimum":[32,114],"design.":[33,115],"This":[34,116],"exploration":[35,82],"is":[36],"currently":[37],"performed":[38],"using":[39,141],"cycle":[40,106,165],"accurate":[41,45,107,166],"simulators":[42,108],"that":[43],"but":[46,168],"slow,":[47],"limiting":[48],"comprehensive":[50],"search":[51],"of":[52,83,138,144,163],"options.":[54],"The":[55,73,132],"vast":[56],"space":[58,87,101],"time":[60],"market":[62],"economic":[63],"pressures":[64],"motivate":[65],"the":[66,84,118,122,135,164],"need":[67],"for":[68,88],"faster":[69,127],"architectural":[70],"evaluation":[71],"methods.":[72],"model":[74,133],"presented":[75],"this":[77],"paper":[78],"facilitates":[79],"rapid":[81],"superscalar":[89,139],"processors.":[90],"It":[91,150],"supplements":[92],"current":[93],"tools":[95],"by":[96],"narrowing":[97],"large":[99],"quickly,":[102],"after":[103],"which":[104],"existing":[105],"can":[109],"arrive":[110],"at":[111],"precise":[113],"allows":[117],"designer":[119],"select":[121],"much":[126],"than":[128],"with":[129,153],"traditional":[130],"tools.":[131],"calculates":[134],"instruction":[136],"throughput":[137],"set":[143],"key":[145],"application":[148],"properties.":[149],"was":[151],"validated":[152],"Simplescalar":[155],"out-of-order":[156],"simulator.":[157],"Results":[158],"were":[159],"within":[160],"5.5%":[161],"accuracy":[162],"simulator,":[167],"executed":[169],"40,000":[170],"times":[171],"faster.":[172]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
