{"id":"https://openalex.org/W2767601584","doi":"https://doi.org/10.1109/itc-asia.2017.8097104","title":"Test generation for open and delay faults in CMOS circuits","display_name":"Test generation for open and delay faults in CMOS circuits","publication_year":2017,"publication_date":"2017-09-01","ids":{"openalex":"https://openalex.org/W2767601584","doi":"https://doi.org/10.1109/itc-asia.2017.8097104","mag":"2767601584"},"language":"en","primary_location":{"id":"doi:10.1109/itc-asia.2017.8097104","is_oa":false,"landing_page_url":"https://doi.org/10.1109/itc-asia.2017.8097104","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Test Conference in Asia (ITC-Asia)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103259979","display_name":"Cheng-Hung Wu","orcid":"https://orcid.org/0000-0002-0475-5756"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Hung Wu","raw_affiliation_strings":["Dept. of EE, National Cheng Kung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of EE, National Cheng Kung University, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079657769","display_name":"Kuen-Jong Lee","orcid":"https://orcid.org/0000-0002-6690-0074"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuen-Jong Lee","raw_affiliation_strings":["Dept. of EE, National Cheng Kung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of EE, National Cheng Kung University, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077101123","display_name":"S.M. Reddy","orcid":"https://orcid.org/0000-0001-9208-8262"},"institutions":[{"id":"https://openalex.org/I126307644","display_name":"University of Iowa","ror":"https://ror.org/036jqmy94","country_code":"US","type":"education","lineage":["https://openalex.org/I126307644"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudhakar M Reddy","raw_affiliation_strings":["Dept. of EE, University of Iowa, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of EE, University of Iowa, USA","institution_ids":["https://openalex.org/I126307644"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.16939199,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"21","last_page":"26"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.8185093998908997},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7507143020629883},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5743600130081177},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.5615299344062805},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5491979718208313},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5164468288421631},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.5030681490898132},{"id":"https://openalex.org/keywords/stuck-at-fault","display_name":"Stuck-at fault","score":0.4987983703613281},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.4783353805541992},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.46861299872398376},{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.4642907381057739},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.45003244280815125},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.44261109828948975},{"id":"https://openalex.org/keywords/fault-model","display_name":"Fault model","score":0.4151528477668762},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3894975483417511},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.32042351365089417},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.28798073530197144},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2746041417121887},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.26275795698165894},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.156347393989563},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09639525413513184}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.8185093998908997},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7507143020629883},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5743600130081177},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.5615299344062805},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5491979718208313},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5164468288421631},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.5030681490898132},{"id":"https://openalex.org/C13625343","wikidata":"https://www.wikidata.org/wiki/Q7627418","display_name":"Stuck-at fault","level":4,"score":0.4987983703613281},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.4783353805541992},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.46861299872398376},{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.4642907381057739},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.45003244280815125},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.44261109828948975},{"id":"https://openalex.org/C167391956","wikidata":"https://www.wikidata.org/wiki/Q1401211","display_name":"Fault model","level":3,"score":0.4151528477668762},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3894975483417511},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.32042351365089417},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.28798073530197144},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2746041417121887},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.26275795698165894},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.156347393989563},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09639525413513184},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/itc-asia.2017.8097104","is_oa":false,"landing_page_url":"https://doi.org/10.1109/itc-asia.2017.8097104","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Test Conference in Asia (ITC-Asia)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","score":0.7699999809265137,"id":"https://metadata.un.org/sdg/16"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1489242265","https://openalex.org/W1735018384","https://openalex.org/W1838626497","https://openalex.org/W1849928240","https://openalex.org/W1975499858","https://openalex.org/W2008990681","https://openalex.org/W2032155184","https://openalex.org/W2035667465","https://openalex.org/W2039924199","https://openalex.org/W2046817879","https://openalex.org/W2097497265","https://openalex.org/W2137552141","https://openalex.org/W2145300792","https://openalex.org/W2148650495","https://openalex.org/W2148914918","https://openalex.org/W2171020103","https://openalex.org/W2294988400","https://openalex.org/W2492599081","https://openalex.org/W2568949342","https://openalex.org/W3149844465","https://openalex.org/W4237634676","https://openalex.org/W6638735712","https://openalex.org/W6644010781"],"related_works":["https://openalex.org/W4256030018","https://openalex.org/W2147400189","https://openalex.org/W2340957901","https://openalex.org/W3147038789","https://openalex.org/W1555400249","https://openalex.org/W2031110496","https://openalex.org/W2568949342","https://openalex.org/W2037862379","https://openalex.org/W4253743993","https://openalex.org/W2157154381"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,33,81],"novel":[4],"circuit":[5],"transformation":[6],"based":[7],"method":[8,85,116],"to":[9,88,95,103,151],"generate":[10,119],"tests":[11,120],"for":[12,145],"cross-wire":[13],"open,":[14],"transistor":[15],"stuck-open":[16],"and":[17,58,68,99,155],"delay":[18,107,147,156],"faults":[19,27,53,98,148,157,166],"inside":[20],"CMOS":[21,110,159],"cells/gates":[22],"as":[23,25,161,163],"well":[24,162],"transition":[26,146,165],"in":[28,54,108,158,167],"interconnects":[29,169],"between":[30],"gates":[31],"using":[32],"unified":[34,46],"model,":[35],"called":[36],"dynamic":[37],"aggressor-victim":[38],"type":[39],"of":[40,93,128,139,142,170],"bridging":[41],"fault":[42,47],"model":[43,48],"(DBF).":[44],"The":[45],"allows":[49],"handling":[50],"all":[51,97,153],"these":[52],"one":[55,117],"ATPG":[56],"run":[57],"thus":[59],"the":[60,90,105,109,126,140,164],"total":[61],"test":[62,72,83,129,143],"generation":[63,84],"time":[64],"can":[65,74,118],"be":[66,75],"reduced":[67],"very":[69],"compact":[70],"(small)":[71],"sets":[73],"obtained.":[76],"In":[77],"addition,":[78],"we":[79],"present":[80],"path-based":[82],"that":[86,134],"aims":[87],"choose":[89],"smallest":[91],"set":[92],"paths":[94],"cover":[96],"each":[100],"path":[101],"tends":[102],"have":[104],"largest":[106],"cell":[111],"containing":[112],"it.":[113],"Using":[114],"this":[115],"with":[121],"better":[122],"quality":[123],"without":[124],"increasing":[125],"number":[127,141],"patterns.":[130],"Experimental":[131],"results":[132],"show":[133],"on":[135],"average":[136],"1.28X":[137],"(1.35X)":[138],"patterns":[144],"are":[149],"sufficient":[150],"detect":[152],"open":[154],"cells":[160],"gate":[168],"ISCAS'89":[171],"(IWLS'05)":[172],"circuits.":[173]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}