{"id":"https://openalex.org/W4413755517","doi":"https://doi.org/10.1109/isvlsi65124.2025.11130287","title":"Efficient Majority Logic Modulo 2<sup>n</sup>-1 Adder Design","display_name":"Efficient Majority Logic Modulo 2<sup>n</sup>-1 Adder Design","publication_year":2025,"publication_date":"2025-07-06","ids":{"openalex":"https://openalex.org/W4413755517","doi":"https://doi.org/10.1109/isvlsi65124.2025.11130287"},"language":"en","primary_location":{"id":"doi:10.1109/isvlsi65124.2025.11130287","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvlsi65124.2025.11130287","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110093376","display_name":"C. Efstathiou","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094138","display_name":"University of West Attica","ror":"https://ror.org/00r2r5k05","country_code":"GR","type":"education","lineage":["https://openalex.org/I4210094138"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Constantinos Efstathiou","raw_affiliation_strings":["University of West Attica,Computer Engineering and Informatics,Athens,Greece"],"affiliations":[{"raw_affiliation_string":"University of West Attica,Computer Engineering and Informatics,Athens,Greece","institution_ids":["https://openalex.org/I4210094138"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090575086","display_name":"Ioannis Kouretas","orcid":"https://orcid.org/0000-0002-8574-8469"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Ioannis Kouretas","raw_affiliation_strings":["University of Patras,Electrical and Computer Engineering,Patras,Greece"],"affiliations":[{"raw_affiliation_string":"University of Patras,Electrical and Computer Engineering,Patras,Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082037558","display_name":"Paris Kitsos","orcid":"https://orcid.org/0000-0003-1851-8775"},"institutions":[{"id":"https://openalex.org/I158716096","display_name":"University of Peloponnese","ror":"https://ror.org/04d4d3c02","country_code":"GR","type":"education","lineage":["https://openalex.org/I158716096"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Paris Kitsos","raw_affiliation_strings":["University of Peloponnese,Electrical and Computer Engineering,Patras,Greece"],"affiliations":[{"raw_affiliation_string":"University of Peloponnese,Electrical and Computer Engineering,Patras,Greece","institution_ids":["https://openalex.org/I158716096"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5110093376"],"corresponding_institution_ids":["https://openalex.org/I4210094138"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.27295392,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9782000184059143,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.7994933724403381},{"id":"https://openalex.org/keywords/modulo","display_name":"Modulo","score":0.6371361613273621},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.5678139925003052},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4910130500793457},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34448111057281494},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2556186616420746},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.22287830710411072},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09604275226593018}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.7994933724403381},{"id":"https://openalex.org/C54732982","wikidata":"https://www.wikidata.org/wiki/Q1415345","display_name":"Modulo","level":2,"score":0.6371361613273621},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.5678139925003052},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4910130500793457},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34448111057281494},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2556186616420746},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.22287830710411072},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09604275226593018},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvlsi65124.2025.11130287","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvlsi65124.2025.11130287","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2516396101","https://openalex.org/W2790557758","https://openalex.org/W2315607643","https://openalex.org/W2013839957","https://openalex.org/W3196607417"],"abstract_inverted_index":{"The":[0,48],"design":[1,49],"of":[2,11,30,36,50,65,79],"arithmetic":[3],"circuits":[4],"in":[5,27,57],"beyond":[6],"CMOS":[7],"nanotechnologies":[8],"has":[9],"been":[10],"recent":[12],"interest.":[13],"Majority":[14],"and":[15,88],"minority":[16],"gates,":[17],"together":[18],"with":[19],"inverters,":[20],"serve":[21],"as":[22],"the":[23,34],"intrinsic":[24],"logic":[25,63,77],"primitives":[26],"a":[28,44],"range":[29],"emerging":[31],"nanotechnologies.":[32],"Within":[33],"spectrum":[35],"high-performance":[37],"addition":[38],"schemes,":[39],"parallel-prefix":[40,68,81],"adder":[41,84],"structures":[42],"occupy":[43],"particularly":[45],"prominent":[46],"position.":[47],"efficient":[51,61],"modulo":[52,66,82],"$2^{n}-1$":[53,67,83],"adders":[54,69],"is":[55,70],"used":[56],"many":[58],"applications.":[59],"Therefore,":[60],"majority":[62,76],"implementation":[64,78],"highly":[71],"desirable.":[72],"In":[73],"this":[74],"work,":[75],"existing":[80],"architectures":[85],"are":[86],"presented":[87],"compared.":[89]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}