{"id":"https://openalex.org/W4413755172","doi":"https://doi.org/10.1109/isvlsi65124.2025.11130284","title":"Hierarchical Optimization of Karatsuba Multipliers for ECDSA Hardware Accelerators","display_name":"Hierarchical Optimization of Karatsuba Multipliers for ECDSA Hardware Accelerators","publication_year":2025,"publication_date":"2025-07-06","ids":{"openalex":"https://openalex.org/W4413755172","doi":"https://doi.org/10.1109/isvlsi65124.2025.11130284"},"language":"en","primary_location":{"id":"doi:10.1109/isvlsi65124.2025.11130284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvlsi65124.2025.11130284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113401249","display_name":"Pruthvi Parate","orcid":null},"institutions":[{"id":"https://openalex.org/I181514455","display_name":"International Institute of Information Technology Bangalore","ror":"https://ror.org/05h9eqy10","country_code":"IN","type":"education","lineage":["https://openalex.org/I181514455"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pruthvi Parate","raw_affiliation_strings":["IIIT Bangalore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IIIT Bangalore","institution_ids":["https://openalex.org/I181514455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045026856","display_name":"Daksh Sharma","orcid":"https://orcid.org/0009-0004-6351-847X"},"institutions":[{"id":"https://openalex.org/I181514455","display_name":"International Institute of Information Technology Bangalore","ror":"https://ror.org/05h9eqy10","country_code":"IN","type":"education","lineage":["https://openalex.org/I181514455"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Daksh Sharma","raw_affiliation_strings":["IIIT Bangalore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IIIT Bangalore","institution_ids":["https://openalex.org/I181514455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037206561","display_name":"Alwin Shaju","orcid":null},"institutions":[{"id":"https://openalex.org/I181514455","display_name":"International Institute of Information Technology Bangalore","ror":"https://ror.org/05h9eqy10","country_code":"IN","type":"education","lineage":["https://openalex.org/I181514455"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Alwin Shaju","raw_affiliation_strings":["IIIT Bangalore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IIIT Bangalore","institution_ids":["https://openalex.org/I181514455"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061397479","display_name":"Madhav Rao","orcid":"https://orcid.org/0000-0003-2278-9148"},"institutions":[{"id":"https://openalex.org/I181514455","display_name":"International Institute of Information Technology Bangalore","ror":"https://ror.org/05h9eqy10","country_code":"IN","type":"education","lineage":["https://openalex.org/I181514455"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Madhav Rao","raw_affiliation_strings":["IIIT Bangalore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IIIT Bangalore","institution_ids":["https://openalex.org/I181514455"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I181514455"],"apc_list":null,"apc_paid":null,"fwci":1.5151,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.80584261,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6614117622375488},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5741643905639648},{"id":"https://openalex.org/keywords/elliptic-curve-digital-signature-algorithm","display_name":"Elliptic Curve Digital Signature Algorithm","score":0.5039822459220886},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.4612428545951843},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.34196633100509644},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3261922001838684},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.26783323287963867},{"id":"https://openalex.org/keywords/elliptic-curve-cryptography","display_name":"Elliptic curve cryptography","score":0.2380688190460205},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13664159178733826},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.11253899335861206},{"id":"https://openalex.org/keywords/public-key-cryptography","display_name":"Public-key cryptography","score":0.11003455519676208}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6614117622375488},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5741643905639648},{"id":"https://openalex.org/C197966572","wikidata":"https://www.wikidata.org/wiki/Q915079","display_name":"Elliptic Curve Digital Signature Algorithm","level":5,"score":0.5039822459220886},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.4612428545951843},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.34196633100509644},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3261922001838684},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.26783323287963867},{"id":"https://openalex.org/C167615521","wikidata":"https://www.wikidata.org/wiki/Q1048911","display_name":"Elliptic curve cryptography","level":4,"score":0.2380688190460205},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13664159178733826},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.11253899335861206},{"id":"https://openalex.org/C203062551","wikidata":"https://www.wikidata.org/wiki/Q201339","display_name":"Public-key cryptography","level":3,"score":0.11003455519676208}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvlsi65124.2025.11130284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvlsi65124.2025.11130284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1633979435","https://openalex.org/W2110905114","https://openalex.org/W2116661285","https://openalex.org/W2128546931","https://openalex.org/W2626155695","https://openalex.org/W2978569441","https://openalex.org/W2999556491","https://openalex.org/W4206438819","https://openalex.org/W4213306896","https://openalex.org/W4226272697","https://openalex.org/W4377294127","https://openalex.org/W4386474829","https://openalex.org/W4386474840","https://openalex.org/W4386820918","https://openalex.org/W4390097863","https://openalex.org/W4396980828","https://openalex.org/W4401808682"],"related_works":["https://openalex.org/W2356622127","https://openalex.org/W107387387","https://openalex.org/W2781707110","https://openalex.org/W3160302493","https://openalex.org/W2620701594","https://openalex.org/W3143639864","https://openalex.org/W2551738595","https://openalex.org/W2047347004","https://openalex.org/W2367832304","https://openalex.org/W3152699334"],"abstract_inverted_index":{"The":[0,63,90],"Elliptic":[1],"Curve":[2],"Digital":[3,15],"Signature":[4,16],"Algorithm":[5,17],"(ECDSA)":[6],"stands":[7],"as":[8],"an":[9],"advanced":[10,167],"alternative":[11],"to":[12,26,34,50,145],"the":[13,20,40,46,83,135,154,166,179],"traditional":[14],"(DSA),":[18],"leveraging":[19],"mathematical":[21],"strength":[22],"of":[23,42,115,126],"elliptic":[24],"curves":[25],"deliver":[27],"enhanced":[28],"security":[29],"and":[30,60,75,102,111,117,191],"computational":[31],"efficiency-particularly":[32],"beneficial":[33],"resourceconstrained":[35],"systems.":[36],"This":[37],"work":[38],"explores":[39],"design":[41,139,181],"ECDSA":[43,100,142,168],"architecture,":[44],"integrating":[45,163],"NSGA-II":[47],"optimization":[48,91],"framework":[49,92],"enhance":[51],"$\\mathbf{G":[52],"F}\\left(2^{163}\\right)$":[53],"Karatsuba":[54,95],"multipliers":[55],"within":[56],"both":[57,109],"signature":[58],"generation":[59],"verification":[61],"units.":[62],"proposed":[64],"hierarchically":[65,136],"optimized":[66,137,164],"designs":[67],"were":[68],"synthesized":[69],"on":[70,77,151],"a":[71,171],"Kintex":[72],"UltraScale":[73],"FPGA":[74,110],"evaluated":[76,160],"silicon":[78],"using":[79],"OpenROAD":[80],"automation":[81],"with":[82],"Nangate":[84],"45":[85],"nm":[86],"standard":[87],"cell":[88],"library.":[89],"identifies":[93],"optimal":[94],"multiplier":[96,138],"sequences":[97],"integrated":[98],"into":[99],"architectures":[101],"benchmarked":[103],"against":[104],"state-of-the-art":[105],"(SOTA)":[106],"designs.":[107,161],"On":[108],"silicon,":[112,152],"area":[113],"improvement":[114,125,157],"67.25%":[116],"22.49%,":[118],"respectively,":[119],"was":[120,132,149],"realized.":[121],"A":[122],"Figure-of-Merit":[123],"(FoM)":[124],"$\\mathbf{4":[127],"8.":[128],"7":[129],"2":[130],"\\%}$":[131],"established":[133],"for":[134,186],"factored":[140],"in":[141,174],"architectures.":[143],"Up":[144],"83.31%":[146],"area-delay-product":[147],"gain":[148],"achieved":[150],"marking":[153],"most":[155],"significant":[156],"among":[158],"all":[159],"By":[162],"multipliers,":[165],"architecture":[169],"marks":[170],"key":[172],"advancement":[173],"robust":[175],"hardware":[176,180],"security.":[177],"All":[178],"files":[182],"are":[183],"freely":[184],"available":[185],"further":[187],"use":[188],"by":[189],"designers":[190],"researchers.":[192]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
