{"id":"https://openalex.org/W4413755501","doi":"https://doi.org/10.1109/isvlsi65124.2025.11130272","title":"Efficient Tree Architecture for the Design of Static CMOS Magnitude Comparators","display_name":"Efficient Tree Architecture for the Design of Static CMOS Magnitude Comparators","publication_year":2025,"publication_date":"2025-07-06","ids":{"openalex":"https://openalex.org/W4413755501","doi":"https://doi.org/10.1109/isvlsi65124.2025.11130272"},"language":"en","primary_location":{"id":"doi:10.1109/isvlsi65124.2025.11130272","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvlsi65124.2025.11130272","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110093376","display_name":"C. Efstathiou","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094138","display_name":"University of West Attica","ror":"https://ror.org/00r2r5k05","country_code":"GR","type":"education","lineage":["https://openalex.org/I4210094138"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Constantinos Efstathiou","raw_affiliation_strings":["University of West Attica,Dept. of Informatics and Computer Engineering,Athens,Greece"],"affiliations":[{"raw_affiliation_string":"University of West Attica,Dept. of Informatics and Computer Engineering,Athens,Greece","institution_ids":["https://openalex.org/I4210094138"]}]},{"author_position":"middle","author":{"id":null,"display_name":"John Liaperdos","orcid":null},"institutions":[{"id":"https://openalex.org/I158716096","display_name":"University of Peloponnese","ror":"https://ror.org/04d4d3c02","country_code":"GR","type":"education","lineage":["https://openalex.org/I158716096"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"John Liaperdos","raw_affiliation_strings":["University of the Peloponnese,Dept. of Digital Systems,Sparta,Greece"],"affiliations":[{"raw_affiliation_string":"University of the Peloponnese,Dept. of Digital Systems,Sparta,Greece","institution_ids":["https://openalex.org/I158716096"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036684985","display_name":"Yiorgos Tsiatouhas","orcid":"https://orcid.org/0000-0001-8408-6929"},"institutions":[{"id":"https://openalex.org/I194019607","display_name":"University of Ioannina","ror":"https://ror.org/01qg3j183","country_code":"GR","type":"education","lineage":["https://openalex.org/I194019607"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Yiorgos Tsiatouhas","raw_affiliation_strings":["University of Ioannina,Dept. of Computer Science and Engineering,Ioannina,Greece"],"affiliations":[{"raw_affiliation_string":"University of Ioannina,Dept. of Computer Science and Engineering,Ioannina,Greece","institution_ids":["https://openalex.org/I194019607"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5110093376"],"corresponding_institution_ids":["https://openalex.org/I4210094138"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20197285,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9908000230789185,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/magnitude","display_name":"Magnitude (astronomy)","score":0.645523726940155},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6451524496078491},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.6279641389846802},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5381376147270203},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5335595607757568},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.5016014575958252},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4639641046524048},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40387725830078125},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.19331207871437073},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.16083088517189026},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14506733417510986},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14174959063529968},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07284995913505554}],"concepts":[{"id":"https://openalex.org/C126691448","wikidata":"https://www.wikidata.org/wiki/Q2028919","display_name":"Magnitude (astronomy)","level":2,"score":0.645523726940155},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6451524496078491},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.6279641389846802},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5381376147270203},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5335595607757568},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.5016014575958252},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4639641046524048},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40387725830078125},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.19331207871437073},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.16083088517189026},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14506733417510986},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14174959063529968},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07284995913505554},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C1276947","wikidata":"https://www.wikidata.org/wiki/Q333","display_name":"Astronomy","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvlsi65124.2025.11130272","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvlsi65124.2025.11130272","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1972913619","https://openalex.org/W1979588383","https://openalex.org/W1992288365","https://openalex.org/W2009513241","https://openalex.org/W2027104619","https://openalex.org/W2061528230","https://openalex.org/W2074224805","https://openalex.org/W2123545979","https://openalex.org/W2125053327","https://openalex.org/W2128602413","https://openalex.org/W2171123968","https://openalex.org/W2171518439","https://openalex.org/W2540548506","https://openalex.org/W2912473265","https://openalex.org/W2979788207","https://openalex.org/W4308659688"],"related_works":["https://openalex.org/W2034349229","https://openalex.org/W3004219868","https://openalex.org/W4366783034","https://openalex.org/W1972415042","https://openalex.org/W4313221225","https://openalex.org/W2150642609","https://openalex.org/W2005410346","https://openalex.org/W2023494387","https://openalex.org/W4306816370","https://openalex.org/W2044867305"],"abstract_inverted_index":{"Magnitude":[0],"comparators":[1,27],"are":[2],"of":[3,25],"great":[4],"importance":[5],"in":[6,28],"modern":[7],"high-performance":[8],"systems.":[9],"In":[10,74],"this":[11],"paper,":[12],"we":[13],"propose":[14],"a":[15],"new,":[16],"efficient":[17],"tree":[18,68],"architecture":[19,33],"for":[20,76,95],"the":[21,51,77,96,100,112],"full":[22,70],"custom":[23,71],"design":[24,72,114],"magnitude":[26],"static":[29],"CMOS":[30],"logic.":[31],"This":[32],"provides":[34],"comparator":[35,98],"designs":[36],"with":[37,62],"reduced":[38,57,104],"propagation":[39,52],"delay":[40,53],"times":[41],"and":[42],"silicon":[43,82],"area":[44,83,87],"cost.":[45],"According":[46],"to":[47,60,64,92,108],"extended":[48],"simulation":[49],"results,":[50],"is":[54,103,116],"equal":[55],"or":[56],"by":[58],"up":[59],"13%":[61],"respect":[63],"state-of-the-art":[65],"64":[66,79],"-bit,":[67],"architecture,":[69],"comparators.":[73],"addition,":[75],"same":[78],"-bit":[80],"size,":[81],"comparisons":[84],"show":[85],"an":[86],"reduction":[88],"ranging":[89],"from":[90,105],"8%":[91],"21%.":[93],"Overall,":[94],"64-bit":[97],"designs,":[99],"power-delay-area":[101],"product":[102],"$12":[106],"\\%$":[107,110],"$26":[109],"when":[111],"proposed":[113],"scheme":[115],"adopted.":[117]},"counts_by_year":[],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}
