{"id":"https://openalex.org/W2145251301","doi":"https://doi.org/10.1109/isvlsi.2002.1016887","title":"Accelerating retiming under the coupled-edge timing model","display_name":"Accelerating retiming under the coupled-edge timing model","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2145251301","doi":"https://doi.org/10.1109/isvlsi.2002.1016887","mag":"2145251301"},"language":"en","primary_location":{"id":"doi:10.1109/isvlsi.2002.1016887","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvlsi.2002.1016887","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087480909","display_name":"I. Neumann","orcid":null},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"I. Neumann","raw_affiliation_strings":["Department of Electrical Engineering and Information Technology Electronic Design Automation Group, University of Kaiserslautern Germany, Germany","Dept. of Electr. Eng. & Inf. Technol., Kaiserslautern Univ., Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Technology Electronic Design Automation Group, University of Kaiserslautern Germany, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. Eng. & Inf. Technol., Kaiserslautern Univ., Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054257737","display_name":"K. Sulimma","orcid":null},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"K. Sulimma","raw_affiliation_strings":["Department of Electrical Engineering and Information Technology Electronic Design Automation Group, University of Kaiserslautern Germany, Germany","Dept. of Electr. Eng. & Inf. Technol., Kaiserslautern Univ., Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Technology Electronic Design Automation Group, University of Kaiserslautern Germany, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. Eng. & Inf. Technol., Kaiserslautern Univ., Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066184879","display_name":"Wolfgang Kunz","orcid":"https://orcid.org/0000-0002-6612-2946"},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"W. Kunz","raw_affiliation_strings":["Department of Electrical Engineering and Information Technology Electronic Design Automation Group, University of Kaiserslautern Germany, Germany","Dept. of Electr. Eng. & Inf. Technol., Kaiserslautern Univ., Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Technology Electronic Design Automation Group, University of Kaiserslautern Germany, Germany","institution_ids":["https://openalex.org/I153267046"]},{"raw_affiliation_string":"Dept. of Electr. Eng. & Inf. Technol., Kaiserslautern Univ., Germany","institution_ids":["https://openalex.org/I153267046"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I153267046"],"apc_list":null,"apc_paid":null,"fwci":0.2325,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.48716619,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"135","last_page":"140"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/retiming","display_name":"Retiming","score":0.9772220253944397},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.755914032459259},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.5583176016807556},{"id":"https://openalex.org/keywords/bar","display_name":"Bar (unit)","score":0.5169179439544678},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.49673253297805786},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.48625338077545166},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.46787306666374207},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.44071725010871887},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.42546674609184265},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36221277713775635},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0989527702331543},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09638446569442749},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08999013900756836}],"concepts":[{"id":"https://openalex.org/C41112130","wikidata":"https://www.wikidata.org/wiki/Q2146175","display_name":"Retiming","level":2,"score":0.9772220253944397},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.755914032459259},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.5583176016807556},{"id":"https://openalex.org/C188721877","wikidata":"https://www.wikidata.org/wiki/Q103510","display_name":"Bar (unit)","level":2,"score":0.5169179439544678},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.49673253297805786},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.48625338077545166},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.46787306666374207},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.44071725010871887},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.42546674609184265},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36221277713775635},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0989527702331543},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09638446569442749},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08999013900756836},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C153294291","wikidata":"https://www.wikidata.org/wiki/Q25261","display_name":"Meteorology","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isvlsi.2002.1016887","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvlsi.2002.1016887","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.68.3497","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.68.3497","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://eis.eit.uni-kl.de/eis/research/publications/papers/isvlsi02_1.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5199999809265137,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1989297294","https://openalex.org/W1990011744","https://openalex.org/W2018540799","https://openalex.org/W2066408410","https://openalex.org/W2076883294","https://openalex.org/W2087656024","https://openalex.org/W2120060202","https://openalex.org/W2125651818","https://openalex.org/W2128459799","https://openalex.org/W2133467274","https://openalex.org/W2148631003","https://openalex.org/W2158048816","https://openalex.org/W2162233102","https://openalex.org/W2165108765","https://openalex.org/W2169417961","https://openalex.org/W4238478983","https://openalex.org/W4245788159","https://openalex.org/W6648089642","https://openalex.org/W6667177567","https://openalex.org/W6681971441","https://openalex.org/W6683374142","https://openalex.org/W6684885144"],"related_works":["https://openalex.org/W2134549436","https://openalex.org/W233224440","https://openalex.org/W2160236198","https://openalex.org/W1951668625","https://openalex.org/W2903287280","https://openalex.org/W3140976369","https://openalex.org/W2132158474","https://openalex.org/W2161928569","https://openalex.org/W4238503248","https://openalex.org/W1937646452"],"abstract_inverted_index":{"Retiming":[0],"has":[1,93,138,147],"been":[2,26,52,94,139,148],"shown":[3],"to":[4],"be":[5],"a":[6,62,79,86,101,117],"powerful":[7],"technique":[8,102,112],"for":[9,35,69,103,116],"improving":[10],"the":[11,28,39,124,136],"performance":[12],"of":[13,21,108,119],"synchronous":[14],"circuits.":[15,37],"However,":[16,59],"even":[17],"though":[18],"retiming":[19,80],"algorithms":[20,121],"polynomial":[22],"time":[23,107],"complexity":[24],"have":[25,51],"developed":[27,53],"runtimes":[29],"still":[30],"may":[31],"become":[32],"prohibitively":[33],"long":[34],"large":[36],"For":[38],"original":[40],"FEAS":[41,60],"algorithm":[42,81],"proposed":[43,127],"by":[44,128,150],"Leiserson":[45],"and":[46,130,144],"Saxe":[47],"(1983,1991),":[48],"acceleration":[49],"techniques":[50],"solving":[54],"this":[55,91,97,134],"problem":[56,92],"in":[57],"practice.":[58],"uses":[61],"simple":[63],"circuit":[64,125],"model":[65,89,126],"being":[66],"fairly":[67],"inaccurate":[68],"gate":[70],"level":[71],"net":[72],"lists":[73],"mapped":[74],"onto":[75],"actual":[76],"technologies.":[77],"Recently":[78],"FEAS/spl":[82,109,142],"I.bar/CTM":[83,143],"based":[84,122],"on":[85,123],"new":[87],"timing":[88],"tackling":[90],"proposed.":[95],"In":[96,133],"paper":[98],"we":[99],"present":[100],"speeding":[104],"up":[105],"execution":[106],"I.bar/CTM.":[110],"This":[111],"is":[113],"also":[114],"suitable":[115],"variety":[118],"published":[120],"Soyata":[129],"Friedman":[131],"(1994,1997).":[132],"work":[135],"approach":[137],"integrated":[140],"into":[141],"its":[145],"benefit":[146],"proven":[149],"experimental":[151],"results.":[152]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
