{"id":"https://openalex.org/W2761087120","doi":"https://doi.org/10.1109/isvdat.2016.8064863","title":"A method to design a comparator for sampled data processing applications","display_name":"A method to design a comparator for sampled data processing applications","publication_year":2016,"publication_date":"2016-05-01","ids":{"openalex":"https://openalex.org/W2761087120","doi":"https://doi.org/10.1109/isvdat.2016.8064863","mag":"2761087120"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2016.8064863","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2016.8064863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 20th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056245980","display_name":"Rama Prasad Acharya","orcid":null},"institutions":[{"id":"https://openalex.org/I57496824","display_name":"National Institute of Technology Arunachal Pradesh","ror":"https://ror.org/020cr8c43","country_code":"IN","type":"education","lineage":["https://openalex.org/I57496824"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Rama Prasad Acharya","raw_affiliation_strings":["Department of Electronics & Communication Engineering, National Institute of Technology, Arunachal Pradesh, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, National Institute of Technology, Arunachal Pradesh, India","institution_ids":["https://openalex.org/I57496824"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046326503","display_name":"Abir J. Mondal","orcid":"https://orcid.org/0000-0001-8023-4103"},"institutions":[{"id":"https://openalex.org/I57496824","display_name":"National Institute of Technology Arunachal Pradesh","ror":"https://ror.org/020cr8c43","country_code":"IN","type":"education","lineage":["https://openalex.org/I57496824"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Abir J Mondal","raw_affiliation_strings":["Department of Electronics & Communication Engineering, National Institute of Technology, Arunachal Pradesh, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, National Institute of Technology, Arunachal Pradesh, India","institution_ids":["https://openalex.org/I57496824"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009067589","display_name":"Alak Majumder","orcid":"https://orcid.org/0000-0003-4775-8591"},"institutions":[{"id":"https://openalex.org/I57496824","display_name":"National Institute of Technology Arunachal Pradesh","ror":"https://ror.org/020cr8c43","country_code":"IN","type":"education","lineage":["https://openalex.org/I57496824"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Alak Majumder","raw_affiliation_strings":["Department of Electronics & Communication Engineering, National Institute of Technology, Arunachal Pradesh, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, National Institute of Technology, Arunachal Pradesh, India","institution_ids":["https://openalex.org/I57496824"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5056245980"],"corresponding_institution_ids":["https://openalex.org/I57496824"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.22671531,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.7322920560836792},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.719332218170166},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11891841888427734},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1127806007862091}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.7322920560836792},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.719332218170166},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11891841888427734},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1127806007862091},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2016.8064863","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2016.8064863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 20th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.4099999964237213,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1784686638","https://openalex.org/W1979588383","https://openalex.org/W1992288365","https://openalex.org/W2061528230","https://openalex.org/W2084283934","https://openalex.org/W2109234924","https://openalex.org/W2128602413","https://openalex.org/W2171123968","https://openalex.org/W6676816201"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2034349229","https://openalex.org/W3004219868","https://openalex.org/W4366783034","https://openalex.org/W1972415042","https://openalex.org/W4313221225","https://openalex.org/W2150642609","https://openalex.org/W2005410346"],"abstract_inverted_index":{"The":[0,43],"performance":[1,51],"of":[2,38,40,58,68,104,118],"a":[3,41,65,88,124,192],"comparator":[4,69,106],"is":[5,73,92,128,137],"significantly":[6,114,183],"affected":[7],"by":[8],"the":[9,14,31,36,56,77,84,96,102,105,116,119,140,152,164,177,185],"time":[10],"taken":[11],"to":[12,20,28,49,75,82,94,173],"determine":[13],"unequal":[15],"bit":[16],"location":[17],"so":[18,47],"as":[19,48],"decide":[21],"greater":[22],"than,":[23],"less":[24],"than":[25],"and":[26,81,107,146,156,184],"equal":[27],"condition.":[29],"Consequently,":[30],"delay":[32,46,80,99,180],"will":[33],"increase":[34],"with":[35,55,70],"number":[37],"bits":[39],"comparator.":[42],"reduction":[44],"in":[45,191],"improve":[50,83],"can":[52,188],"be":[53,189],"achieved":[54],"introduction":[57],"multilevel":[59,89,108,157],"look-ahead":[60,71,90,109,158],"circuit.":[61,159],"In":[62],"this":[63],"work,":[64],"unique":[66],"architecture":[67],"circuit":[72,91,110,167],"introduced":[74],"reduce":[76,95],"worst":[78,178],"case":[79,179],"overall":[85],"performance.":[86],"First,":[87],"described":[93],"critical":[97],"path":[98],"effectively.":[100],"Secondly,":[101],"realization":[103],"using":[111,130,139,151],"domino":[112,131],"logic":[113],"reduces":[115],"complexity":[117],"entire":[120,186],"architecture.":[121],"At":[122],"first,":[123],"4-bit":[125],"unit":[126,141],"cell":[127],"designed":[129],"logic.":[132],"Thereafter,":[133],"an":[134],"8-bit":[135,154],"macro":[136,155],"realized":[138],"cell.":[142],"Further,":[143],"16-bit,":[144],"32-bit":[145],"64-bit":[147,166],"circuits":[148],"are":[149],"developed":[150],"proposed":[153,165],"Simulation":[160],"results":[161],"show":[162],"that":[163],"has":[168,181],"improved":[169],"power":[170],"dissipation":[171],"compared":[172],"existing":[174],"architectures.":[175],"Moreover,":[176],"reduced":[182],"operation":[187],"performed":[190],"single":[193],"clock":[194],"cycle.":[195]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}