{"id":"https://openalex.org/W2761171284","doi":"https://doi.org/10.1109/isvdat.2016.8064858","title":"A robust 8T FinFET SRAM cell with improved stability for low voltage applications","display_name":"A robust 8T FinFET SRAM cell with improved stability for low voltage applications","publication_year":2016,"publication_date":"2016-05-01","ids":{"openalex":"https://openalex.org/W2761171284","doi":"https://doi.org/10.1109/isvdat.2016.8064858","mag":"2761171284"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2016.8064858","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2016.8064858","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 20th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079357882","display_name":"C. B. Kushwah","orcid":"https://orcid.org/0000-0002-8327-7579"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"C. B. Kushwah","raw_affiliation_strings":["Nanoscalc Devices and VLSI/ULSI Circuit and System Design, Indian Institute of Technology Indore, Indore, M.P., India"],"affiliations":[{"raw_affiliation_string":"Nanoscalc Devices and VLSI/ULSI Circuit and System Design, Indian Institute of Technology Indore, Indore, M.P., India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113195270","display_name":"Devesh Dwivedi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210136115","display_name":"Healthcare Global Enterprises","ror":"https://ror.org/046k3mr17","country_code":"IN","type":"healthcare","lineage":["https://openalex.org/I4210136115"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Devesh Dwivedi","raw_affiliation_strings":["Globalfoundries, Bangalore, Karnataka, India"],"affiliations":[{"raw_affiliation_string":"Globalfoundries, Bangalore, Karnataka, India","institution_ids":["https://openalex.org/I4210136115"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030168277","display_name":"N Sathisha","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"N Sathisha","raw_affiliation_strings":["Arise Technology Pvt Ltd, Bangalore, Karnataka, India"],"affiliations":[{"raw_affiliation_string":"Arise Technology Pvt Ltd, Bangalore, Karnataka, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036909129","display_name":"Krishnan S. Rengarajan","orcid":"https://orcid.org/0000-0001-5967-3005"},"institutions":[{"id":"https://openalex.org/I4210136115","display_name":"Healthcare Global Enterprises","ror":"https://ror.org/046k3mr17","country_code":"IN","type":"healthcare","lineage":["https://openalex.org/I4210136115"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Krishnan S Rengarajan","raw_affiliation_strings":["Globalfoundries, Bangalore, Karnataka, India"],"affiliations":[{"raw_affiliation_string":"Globalfoundries, Bangalore, Karnataka, India","institution_ids":["https://openalex.org/I4210136115"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5079357882"],"corresponding_institution_ids":["https://openalex.org/I64295750"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.22675653,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"19","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.7900015711784363},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7489150762557983},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5734094381332397},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5489212274551392},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.52008455991745},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.49835634231567383},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4924965798854828},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4900254011154175},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.4542045295238495},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.45082661509513855},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.44981199502944946},{"id":"https://openalex.org/keywords/memory-cell","display_name":"Memory cell","score":0.4308118522167206},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.41324496269226074},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.4121641218662262},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4061768054962158},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2508799731731415},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2379995882511139},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2345675826072693},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.18932369351387024},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17003309726715088}],"concepts":[{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.7900015711784363},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7489150762557983},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5734094381332397},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5489212274551392},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.52008455991745},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.49835634231567383},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4924965798854828},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4900254011154175},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.4542045295238495},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.45082661509513855},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.44981199502944946},{"id":"https://openalex.org/C2776638159","wikidata":"https://www.wikidata.org/wiki/Q18343761","display_name":"Memory cell","level":4,"score":0.4308118522167206},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.41324496269226074},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.4121641218662262},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4061768054962158},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2508799731731415},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2379995882511139},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2345675826072693},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.18932369351387024},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17003309726715088},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2016.8064858","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2016.8064858","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 20th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7400000095367432}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1589130434","https://openalex.org/W2002612140","https://openalex.org/W2088072859","https://openalex.org/W2089731760","https://openalex.org/W2095913060","https://openalex.org/W2106264726","https://openalex.org/W2106507957","https://openalex.org/W2108911707","https://openalex.org/W2110589036","https://openalex.org/W2144289559","https://openalex.org/W2149009819","https://openalex.org/W2164330002","https://openalex.org/W2168101540","https://openalex.org/W2397682474","https://openalex.org/W6676843315"],"related_works":["https://openalex.org/W1526857568","https://openalex.org/W2525077515","https://openalex.org/W2118152793","https://openalex.org/W2141625582","https://openalex.org/W4388000032","https://openalex.org/W2162806231","https://openalex.org/W2080140894","https://openalex.org/W2949071089","https://openalex.org/W629662700","https://openalex.org/W2053154428"],"abstract_inverted_index":{"As":[0],"we":[1,6,68,85],"move":[2],"in":[3,37,42,58,102],"sub-nanometer":[4],"range,":[5],"have":[7,86],"to":[8,24,34,40,61,70,134,148],"deal":[9],"with":[10,14,73,150],"its":[11],"darker":[12],"side":[13],"problems":[15],"like":[16],"short":[17],"channel":[18],"effects.":[19],"The":[20,109],"yield":[21,65,105],"loss":[22,63],"due":[23],"device":[25],"and":[26,79,93,124],"process":[27,56,74],"variations":[28,57],"has":[29],"never":[30],"been":[31],"so":[32],"critical":[33],"cause":[35],"failure":[36],"circuits.":[38],"Due":[39],"growth":[41],"size":[43,53],"of":[44,51,64,112],"embedded":[45],"SRAMs":[46],"as":[47,49,132,146],"well":[48],"usage":[50],"small":[52],"memory":[54],"cells,":[55],"cells":[59],"leads":[60],"significant":[62],"for":[66],"that":[67],"need":[69],"come":[71],"up":[72],"variation":[75],"tolerant":[76],"circuit":[77],"styles":[78],"new":[80],"devices.":[81],"In":[82],"this":[83],"paper,":[84],"used":[87],"reverse":[88],"bitlines":[89],"feedback":[90],"control":[91],"(RBLFC)":[92],"data":[94],"isolation":[95],"enhanced":[96],"read":[97],"(DIER)":[98],"techniques":[99],"which":[100],"results":[101],"7":[103],"sigma":[104],"at":[106],"system":[107],"level.":[108],"novel":[110],"structure":[111],"proposed":[113],"8T":[114,139],"cell":[115,140],"gives":[116],"6%":[117],"higher":[118,126],"hold":[119],"static":[120,128],"noise":[121,129],"margin":[122,130],"(HSNM)":[123],"66%":[125],"write":[127,144],"(WSNM)":[131],"compared":[133,147],"conventional":[135],"6T":[136,149],"cell.":[137],"Proposed":[138],"allows":[141],"29%":[142],"faster":[143],"operation":[145],"20%":[151],"lower":[152],"leakage":[153],"power.":[154]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
