{"id":"https://openalex.org/W2763228497","doi":"https://doi.org/10.1109/isvdat.2016.8064840","title":"Modeling and yield estimation of SRAM sub-system for different capacities subjected to parametric variations","display_name":"Modeling and yield estimation of SRAM sub-system for different capacities subjected to parametric variations","publication_year":2016,"publication_date":"2016-05-01","ids":{"openalex":"https://openalex.org/W2763228497","doi":"https://doi.org/10.1109/isvdat.2016.8064840","mag":"2763228497"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2016.8064840","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2016.8064840","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 20th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101783272","display_name":"Pulkit Sharma","orcid":"https://orcid.org/0000-0001-7870-7098"},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Pulkit Sharma","raw_affiliation_strings":["Electronics and Communication Department, Indraprastha Institute of Information Technology Delhi (IIIT-Delhi)"],"affiliations":[{"raw_affiliation_string":"Electronics and Communication Department, Indraprastha Institute of Information Technology Delhi (IIIT-Delhi)","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013420718","display_name":"Anil Kumar Gundu","orcid":"https://orcid.org/0000-0002-0519-8701"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]},{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anil K. Gundu","raw_affiliation_strings":["Electronics and Communication Department, Indraprastha Institute of Information Technology Delhi (IIIT-Delhi)"],"affiliations":[{"raw_affiliation_string":"Electronics and Communication Department, Indraprastha Institute of Information Technology Delhi (IIIT-Delhi)","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089109424","display_name":"Mohammad Hashmi","orcid":"https://orcid.org/0000-0002-1772-588X"},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M. S. Hashmi","raw_affiliation_strings":["Electronics and Communication Department, Indraprastha Institute of Information Technology Delhi (IIIT-Delhi)"],"affiliations":[{"raw_affiliation_string":"Electronics and Communication Department, Indraprastha Institute of Information Technology Delhi (IIIT-Delhi)","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101783272"],"corresponding_institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"],"apc_list":null,"apc_paid":null,"fwci":0.3675,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.68720295,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8466184735298157},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.537528395652771},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.5316399335861206},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.5156861543655396},{"id":"https://openalex.org/keywords/yield","display_name":"Yield (engineering)","score":0.47957152128219604},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.46353602409362793},{"id":"https://openalex.org/keywords/column","display_name":"Column (typography)","score":0.45566290616989136},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3841865062713623},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.27498599886894226},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.26089468598365784},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.24153083562850952},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.24110302329063416},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22171300649642944},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.18854215741157532},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11998370289802551},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11197251081466675}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8466184735298157},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.537528395652771},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.5316399335861206},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.5156861543655396},{"id":"https://openalex.org/C134121241","wikidata":"https://www.wikidata.org/wiki/Q899301","display_name":"Yield (engineering)","level":2,"score":0.47957152128219604},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.46353602409362793},{"id":"https://openalex.org/C2780551164","wikidata":"https://www.wikidata.org/wiki/Q2306599","display_name":"Column (typography)","level":3,"score":0.45566290616989136},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3841865062713623},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.27498599886894226},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.26089468598365784},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.24153083562850952},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.24110302329063416},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22171300649642944},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.18854215741157532},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11998370289802551},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11197251081466675},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2016.8064840","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2016.8064840","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 20th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1518236483","https://openalex.org/W1973951147","https://openalex.org/W2035652262","https://openalex.org/W2046515116","https://openalex.org/W2071418701","https://openalex.org/W2092101442","https://openalex.org/W2097207701","https://openalex.org/W2132621842","https://openalex.org/W2154477062","https://openalex.org/W2288397308","https://openalex.org/W4206322010"],"related_works":["https://openalex.org/W1835913819","https://openalex.org/W2169675423","https://openalex.org/W2051363901","https://openalex.org/W2127348582","https://openalex.org/W2373152541","https://openalex.org/W2174410816","https://openalex.org/W3200702775","https://openalex.org/W3209598999","https://openalex.org/W2159817233","https://openalex.org/W2351439697"],"abstract_inverted_index":{"Process":[0],"variations":[1,74],"have":[2],"become":[3],"a":[4,105,139],"major":[5],"challenge":[6],"with":[7,119],"the":[8,32,36,43,117,127,146,180,189,203],"advancement":[9],"in":[10,42,75,78,111,138],"CMOS":[11,114],"technologies.":[12],"The":[13,91,199],"performance":[14],"of":[15,45,66,85,93,100,108,129,142,148,191,193],"memory":[16,109,194],"sub-systems":[17],"such":[18],"as":[19,179],"Static":[20],"Random":[21],"Access":[22],"Memory":[23],"(SRAMs)":[24],"is":[25,95,124,131,153,175,187],"heavily":[26],"dependent":[27],"on":[28,182],"these":[29],"variations.":[30],"Also,":[31],"VLSI":[33],"industry":[34],"requires":[35],"SRAM":[37,67,94,101,206],"bit":[38,79,121],"cell":[39],"to":[40,49,73,166,208],"qualify":[41],"order":[44],"less":[46],"than":[47,211],"0.1ppb":[48],"achieve":[50],"higher":[51],"Yield":[52,63,92],"(Y).":[53],"This":[54],"paper":[55],"proposes":[56],"an":[57],"efficient":[58],"qualitative":[59],"statistical":[60,106],"analysis":[61],"and":[62,82],"estimation":[64],"method":[65],"sub-system":[68,110,118],"which":[69],"considers":[70],"deviations":[71],"due":[72],"process":[76],"parameters":[77],"line":[80],"differential":[81],"input":[83],"offset":[84],"sense":[86],"amplifier":[87],"(SA)":[88],"all":[89],"together.":[90],"predicted":[96],"for":[97,150,161,205],"different":[98],"capacities":[99],"array":[102,207],"by":[103,197],"developing":[104],"model":[107],"65nm":[112],"bulk":[113],"technology.":[115],"For":[116],"64":[120],"cells,":[122],"it":[123,164],"estimated":[125],"that":[126,178],"probability":[128,147,190],"failure":[130,149,192],"4.802":[132],"*":[133,155,168],"10":[134,156,169],"<sup":[135,157,170],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[136,158,171],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-13</sup>":[137],"read":[140],"cycle":[141],"frequency":[143],"1GHz.":[144],"Furthermore,":[145],"8MB":[151],"capacity":[152,163],"5.035":[154],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-7</sup>":[159],"while":[160],"2GB":[162],"increases":[165,196],"1.289":[167],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-5</sup>":[172],".":[173],"It":[174],"also":[176],"observed":[177],"load":[181],"one":[183],"SA":[184],"per":[185],"column":[186],"doubled,":[188],"slice":[195],"70%.":[198],"proposed":[200],"technique":[201],"estimates":[202],"Yield(Y)":[204],"be":[209],"more":[210],"99.9999.":[212]},"counts_by_year":[{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}