{"id":"https://openalex.org/W1550659280","doi":"https://doi.org/10.1109/isvdat.2015.7208131","title":"A new row decoding architecture for fast wordline charging in NOR type Flash memories","display_name":"A new row decoding architecture for fast wordline charging in NOR type Flash memories","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1550659280","doi":"https://doi.org/10.1109/isvdat.2015.7208131","mag":"1550659280"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2015.7208131","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2015.7208131","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 19th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101568385","display_name":"Rohan Sinha","orcid":"https://orcid.org/0000-0002-3606-7181"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]},{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Rohan Sinha","raw_affiliation_strings":["Department of Electronics and Communication Engineering, IIIT Delhi, New Delhi, India","Dept. of Electronics and Communication Engineering IIIT Delhi  New Delhi India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, IIIT Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]},{"raw_affiliation_string":"Dept. of Electronics and Communication Engineering IIIT Delhi  New Delhi India","institution_ids":["https://openalex.org/I119939252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061130304","display_name":"Bhawana Singh Nirwan","orcid":null},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bhawana Singh Nirwan","raw_affiliation_strings":["Department of Electronics and Communication Engineering, IIIT Delhi, New Delhi, India","Dept. of Electronics and Communication Engineering IIIT Delhi  New Delhi India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, IIIT Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]},{"raw_affiliation_string":"Dept. of Electronics and Communication Engineering IIIT Delhi  New Delhi India","institution_ids":["https://openalex.org/I119939252"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089109424","display_name":"Mohammad Hashmi","orcid":"https://orcid.org/0000-0002-1772-588X"},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M. S. Hashmi","raw_affiliation_strings":["Department of Electronics and Communication Engineering, IIIT Delhi, New Delhi, India","Dept. of Electronics and Communication Engineering IIIT Delhi  New Delhi India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, IIIT Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]},{"raw_affiliation_string":"Dept. of Electronics and Communication Engineering IIIT Delhi  New Delhi India","institution_ids":["https://openalex.org/I119939252"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101568385"],"corresponding_institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.02452372,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.7335408926010132},{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.6581881642341614},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5949512124061584},{"id":"https://openalex.org/keywords/flash-memory","display_name":"Flash memory","score":0.5432272553443909},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5248304009437561},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5130042433738708},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.4620024859905243},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4614258110523224},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.44415411353111267},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.43273282051086426},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35402488708496094},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3479236364364624},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3346996605396271},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2590399384498596},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10933288931846619},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.06330862641334534}],"concepts":[{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.7335408926010132},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.6581881642341614},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5949512124061584},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.5432272553443909},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5248304009437561},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5130042433738708},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.4620024859905243},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4614258110523224},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.44415411353111267},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.43273282051086426},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35402488708496094},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3479236364364624},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3346996605396271},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2590399384498596},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10933288931846619},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06330862641334534},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2015.7208131","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2015.7208131","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 19th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8399999737739563}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W403268491","https://openalex.org/W1966510747","https://openalex.org/W2072889086","https://openalex.org/W2096201627","https://openalex.org/W2100937282","https://openalex.org/W2106608471","https://openalex.org/W2111865441","https://openalex.org/W2155439206","https://openalex.org/W6613776317"],"related_works":["https://openalex.org/W2116397085","https://openalex.org/W2535372975","https://openalex.org/W2537636062","https://openalex.org/W2017101954","https://openalex.org/W1594494193","https://openalex.org/W2378293894","https://openalex.org/W2135436866","https://openalex.org/W1994190181","https://openalex.org/W1492907585","https://openalex.org/W3144197728"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,32],"new":[4],"row":[5],"decoding":[6],"architecture":[7],"implemented":[8],"in":[9],"90nm":[10],"STM10":[11],"triple":[12],"well":[13],"CMOS":[14],"technology":[15],"for":[16,41,53],"low":[17,66],"supply":[18,51],"voltage,":[19],"high":[20,54],"speed":[21,64],"NOR":[22],"type":[23],"Flash":[24],"memories.":[25],"The":[26,57],"overall":[27],"design":[28],"is":[29],"complemented":[30],"with":[31,65,72],"novel":[33],"stress":[34],"relaxed":[35],"high/low":[36],"or":[37],"positive/negative":[38],"level":[39,59],"shifter":[40,60],"converting":[42],"the":[43],"digital":[44],"signals":[45],"operating":[46],"at":[47],"1.2V":[48],"to":[49,74],"higher":[50],"voltages":[52],"voltage":[55],"applications.":[56],"proposed":[58],"achieves":[61],"faster":[62],"switching":[63],"power":[67],"consumption":[68],"and":[69,76],"less":[70],"variation":[71],"respect":[73],"process":[75],"temperature.":[77]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
