{"id":"https://openalex.org/W1597623680","doi":"https://doi.org/10.1109/isvdat.2015.7208109","title":"Measurement of de-assertion threshold of power-on-reset circuits","display_name":"Measurement of de-assertion threshold of power-on-reset circuits","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1597623680","doi":"https://doi.org/10.1109/isvdat.2015.7208109","mag":"1597623680"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2015.7208109","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2015.7208109","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 19th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018543857","display_name":"Sanjay Kumar Wadhwa","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Sanjay Kumar Wadhwa","raw_affiliation_strings":["Freescale Semiconductor India Pvt. Ltd., NOIDA, U.P., India","Freescale Semiconductor India Pvt. Ltd., Plot No. 2 and 3, Sector 16A, NOIDA, U.P., India"],"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor India Pvt. Ltd., NOIDA, U.P., India","institution_ids":[]},{"raw_affiliation_string":"Freescale Semiconductor India Pvt. Ltd., Plot No. 2 and 3, Sector 16A, NOIDA, U.P., India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012085288","display_name":"Avinash C. Tripathi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Avinash Chandra Tripathi","raw_affiliation_strings":["Freescale Semiconductor India Pvt. Ltd., NOIDA, U.P., India","Freescale Semiconductor India Pvt. Ltd., Plot No. 2 and 3, Sector 16A, NOIDA, U.P., India"],"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor India Pvt. Ltd., NOIDA, U.P., India","institution_ids":[]},{"raw_affiliation_string":"Freescale Semiconductor India Pvt. Ltd., Plot No. 2 and 3, Sector 16A, NOIDA, U.P., India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5018543857"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.02858956,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/assertion","display_name":"Assertion","score":0.8390450477600098},{"id":"https://openalex.org/keywords/reset","display_name":"Reset (finance)","score":0.7149850130081177},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5650219321250916},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5582018494606018},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5359362363815308},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5266656279563904},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4926634430885315},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47616976499557495},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.46448737382888794},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4631234109401703},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.4442412257194519},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.31922999024391174},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2776032090187073},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1253170669078827}],"concepts":[{"id":"https://openalex.org/C40422974","wikidata":"https://www.wikidata.org/wiki/Q741248","display_name":"Assertion","level":2,"score":0.8390450477600098},{"id":"https://openalex.org/C2779795794","wikidata":"https://www.wikidata.org/wiki/Q7315343","display_name":"Reset (finance)","level":2,"score":0.7149850130081177},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5650219321250916},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5582018494606018},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5359362363815308},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5266656279563904},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4926634430885315},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47616976499557495},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.46448737382888794},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4631234109401703},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.4442412257194519},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.31922999024391174},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2776032090187073},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1253170669078827},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C106159729","wikidata":"https://www.wikidata.org/wiki/Q2294553","display_name":"Financial economics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2015.7208109","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2015.7208109","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 19th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1975971031","https://openalex.org/W2073924955","https://openalex.org/W2164785486","https://openalex.org/W2532161870"],"related_works":["https://openalex.org/W1498103021","https://openalex.org/W2035655557","https://openalex.org/W4230849338","https://openalex.org/W1968067090","https://openalex.org/W4295166216","https://openalex.org/W2177044681","https://openalex.org/W2090313512","https://openalex.org/W2345942070","https://openalex.org/W4244614642","https://openalex.org/W4241238243"],"abstract_inverted_index":{"A":[0],"test":[1,20,45,69,74],"circuit":[2,12,46,70,75],"for":[3],"measuring":[4],"the":[5,16,19,40,50,58,65,68,90],"de-assertion":[6,23,94],"threshold":[7,95],"of":[8,18,53,55,67],"a":[9,30,35],"Power-on-Reset":[10],"(POR)":[11],"is":[13,97],"presented.":[14],"With":[15],"help":[17],"circuit,":[21],"POR":[22,41,56],"voltage":[24,37],"can":[25],"be":[26],"measured":[27],"without":[28],"requiring":[29],"dedicated":[31],"analog":[32],"pad":[33],"or":[34],"supply":[36,42],"higher":[38],"than":[39,99],"voltage.":[43],"The":[44,73,85],"does":[47],"not":[48],"impact":[49],"normal":[51],"mode":[52],"operation":[54],"and":[57,60,79],"area":[59],"power":[61],"overhead":[62],"due":[63],"to":[64],"addition":[66],"are":[71],"minimal.":[72],"has":[76],"been":[77],"designed":[78],"simulated":[80],"in":[81,93],"28nm":[82],"CMOS":[83],"technology.":[84],"simulation":[86],"results":[87],"show":[88],"that":[89],"maximum":[91],"error":[92],"measurement":[96],"less":[98],"+/\u2212":[100],"0.5%.":[101]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}