{"id":"https://openalex.org/W1607090434","doi":"https://doi.org/10.1109/isvdat.2015.7208098","title":"Design of coherence verification unit for heterogeneous CMPs","display_name":"Design of coherence verification unit for heterogeneous CMPs","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1607090434","doi":"https://doi.org/10.1109/isvdat.2015.7208098","mag":"1607090434"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2015.7208098","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2015.7208098","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 19th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004502943","display_name":"Bidesh Chakraborty","orcid":"https://orcid.org/0000-0002-7280-8995"},"institutions":[{"id":"https://openalex.org/I175399479","display_name":"Haldia Institute of Technology","ror":"https://ror.org/0211bs523","country_code":"IN","type":"education","lineage":["https://openalex.org/I175399479"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Bidesh Chakraborty","raw_affiliation_strings":["CSE Department, HIT, Haldia, India"],"affiliations":[{"raw_affiliation_string":"CSE Department, HIT, Haldia, India","institution_ids":["https://openalex.org/I175399479"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045692857","display_name":"Bhanu Pratap Singh","orcid":"https://orcid.org/0000-0002-1574-944X"},"institutions":[{"id":"https://openalex.org/I155837530","display_name":"National Institute of Technology Durgapur","ror":"https://ror.org/04ds0jm32","country_code":"IN","type":"education","lineage":["https://openalex.org/I155837530"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bhanu Pratap Singh","raw_affiliation_strings":["CSE Department, NIT Durgapur, India","CSE Department, NIT, Durgapur, India"],"affiliations":[{"raw_affiliation_string":"CSE Department, NIT Durgapur, India","institution_ids":["https://openalex.org/I155837530"]},{"raw_affiliation_string":"CSE Department, NIT, Durgapur, India","institution_ids":["https://openalex.org/I155837530"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000131945","display_name":"M. Chinnapureddy","orcid":null},"institutions":[{"id":"https://openalex.org/I155837530","display_name":"National Institute of Technology Durgapur","ror":"https://ror.org/04ds0jm32","country_code":"IN","type":"education","lineage":["https://openalex.org/I155837530"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M. Chinnapureddy","raw_affiliation_strings":["CSE Department, NIT Durgapur, India","CSE Department, NIT, Durgapur, India"],"affiliations":[{"raw_affiliation_string":"CSE Department, NIT Durgapur, India","institution_ids":["https://openalex.org/I155837530"]},{"raw_affiliation_string":"CSE Department, NIT, Durgapur, India","institution_ids":["https://openalex.org/I155837530"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024913744","display_name":"Mamata Dalui","orcid":"https://orcid.org/0000-0001-5829-541X"},"institutions":[{"id":"https://openalex.org/I155837530","display_name":"National Institute of Technology Durgapur","ror":"https://ror.org/04ds0jm32","country_code":"IN","type":"education","lineage":["https://openalex.org/I155837530"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Mamata Dalui","raw_affiliation_strings":["CSE Department, NIT Durgapur, India","CSE Department, NIT, Durgapur, India"],"affiliations":[{"raw_affiliation_string":"CSE Department, NIT Durgapur, India","institution_ids":["https://openalex.org/I155837530"]},{"raw_affiliation_string":"CSE Department, NIT, Durgapur, India","institution_ids":["https://openalex.org/I155837530"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089134920","display_name":"Biplab K. Sikdar","orcid":"https://orcid.org/0000-0002-9394-8540"},"institutions":[{"id":"https://openalex.org/I98365261","display_name":"Indian Institute of Engineering Science and Technology, Shibpur","ror":"https://ror.org/02ytfzr55","country_code":"IN","type":"education","lineage":["https://openalex.org/I98365261"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Biplab K Sikdar","raw_affiliation_strings":["CST Department, IIEST Shibpur, India","CST Department, IIEST, Shibpur, India#TAB#"],"affiliations":[{"raw_affiliation_string":"CST Department, IIEST Shibpur, India","institution_ids":["https://openalex.org/I98365261"]},{"raw_affiliation_string":"CST Department, IIEST, Shibpur, India#TAB#","institution_ids":["https://openalex.org/I98365261"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5004502943"],"corresponding_institution_ids":["https://openalex.org/I175399479"],"apc_list":null,"apc_paid":null,"fwci":0.701,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.71675234,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"1","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8361214399337769},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.7742371559143066},{"id":"https://openalex.org/keywords/coherence","display_name":"Coherence (philosophical gambling strategy)","score":0.6303972005844116},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5503994822502136},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5214454531669617},{"id":"https://openalex.org/keywords/automaton","display_name":"Automaton","score":0.5052056908607483},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4856513738632202},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43761131167411804},{"id":"https://openalex.org/keywords/high-level-verification","display_name":"High-level verification","score":0.42962169647216797},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.42124468088150024},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.41034409403800964},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.36716967821121216},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.36315402388572693},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.31204769015312195},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.17807579040527344},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.17634528875350952},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12473341822624207}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8361214399337769},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.7742371559143066},{"id":"https://openalex.org/C2781181686","wikidata":"https://www.wikidata.org/wiki/Q4226068","display_name":"Coherence (philosophical gambling strategy)","level":2,"score":0.6303972005844116},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5503994822502136},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5214454531669617},{"id":"https://openalex.org/C112505250","wikidata":"https://www.wikidata.org/wiki/Q787116","display_name":"Automaton","level":2,"score":0.5052056908607483},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4856513738632202},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43761131167411804},{"id":"https://openalex.org/C187250869","wikidata":"https://www.wikidata.org/wiki/Q5754573","display_name":"High-level verification","level":5,"score":0.42962169647216797},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.42124468088150024},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.41034409403800964},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.36716967821121216},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.36315402388572693},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.31204769015312195},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.17807579040527344},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.17634528875350952},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12473341822624207},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C149091818","wikidata":"https://www.wikidata.org/wiki/Q2429814","display_name":"Software system","level":3,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2015.7208098","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2015.7208098","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 19th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W29127030","https://openalex.org/W171399205","https://openalex.org/W1511688816","https://openalex.org/W1581074884","https://openalex.org/W1974927049","https://openalex.org/W1978125087","https://openalex.org/W2103742924","https://openalex.org/W2123859627","https://openalex.org/W2153184575","https://openalex.org/W2169387321","https://openalex.org/W4249165316"],"related_works":["https://openalex.org/W1539379314","https://openalex.org/W1985271980","https://openalex.org/W4375946032","https://openalex.org/W4389429005","https://openalex.org/W1493746448","https://openalex.org/W2352838072","https://openalex.org/W2150521192","https://openalex.org/W2559043217","https://openalex.org/W2154631307","https://openalex.org/W2376450564"],"abstract_inverted_index":{"In":[0],"embedded":[1],"system-on-a-chip":[2],"(SoC)":[3],"applications,":[4],"the":[5,28,36,73,93,111,121,128,136,144],"demand":[6],"for":[7,44,54,116],"integration":[8],"of":[9,27,38,63,76,95,103,108,113,125,127,135],"heterogenous":[10,58,148],"processors":[11,30],"on":[12,143],"a":[13,46,64,96,104],"single":[14],"chip":[15],"is":[16,85],"increasing.":[17],"It":[18],"adds":[19],"complexity":[20],"in":[21,24,57,99,147],"maintaining":[22],"coherency":[23,146],"data":[25,97],"caches":[26,102],"heterogeneous":[29],"implementing":[31],"different":[32,100],"coherence":[33,39,55,114],"protocols.":[34],"Therefore,":[35],"task":[37],"verification":[40,56,67,115],"also":[41],"becomes":[42],"non-trivial":[43],"such":[45],"system.":[47],"This":[48],"work":[49],"proposes":[50],"an":[51,80],"effective":[52],"solution":[53],"CMPs":[59,149],"system":[60],"through":[61],"introduction":[62],"highly":[65],"efficient":[66],"unit.":[68],"The":[69,131],"proposed":[70],"design":[71,139],"exploits":[72],"modular":[74],"structure":[75],"Cellular":[77],"Automata":[78],"(CA),":[79],"autonomous":[81],"machine.":[82],"A":[83],"CA":[84,122,129,137],"segmented":[86],"to":[87,91],"employ":[88],"one":[89],"segment":[90],"analyze":[92],"states":[94],"block":[98],"private":[101],"homogeneous":[105],"processor":[106],"cluster":[107],"SoC":[109],"and":[110],"outcome":[112],"clusters":[117],"are":[118],"analyzed":[119],"by":[120],"resulted":[123],"out":[124],"augmentation":[126],"segments.":[130],"simple":[132],"hardware":[133],"implementation":[134],"based":[138],"realizes":[140],"quick":[141],"decision":[142],"cache":[145],"with":[150],"100%":[151],"accuracy.":[152]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}