{"id":"https://openalex.org/W2063507524","doi":"https://doi.org/10.1109/isvdat.2014.6881041","title":"A locally reconfigurable Network-on-Chip architecture and application mapping onto it","display_name":"A locally reconfigurable Network-on-Chip architecture and application mapping onto it","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2063507524","doi":"https://doi.org/10.1109/isvdat.2014.6881041","mag":"2063507524"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2014.6881041","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2014.6881041","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108117366","display_name":"J. Soumya","orcid":"https://orcid.org/0000-0003-0112-8383"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"J. Soumya","raw_affiliation_strings":["Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol. Kharagpur, Kharagpur, , India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol. Kharagpur, Kharagpur, , India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100701437","display_name":"Ashish Sharma","orcid":"https://orcid.org/0000-0001-6636-4219"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ashish Sharma","raw_affiliation_strings":["Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol. Kharagpur, Kharagpur, , India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol. Kharagpur, Kharagpur, , India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077947010","display_name":"Santanu Chattopadhyay","orcid":"https://orcid.org/0000-0002-1227-0732"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Santanu Chattopadhyay","raw_affiliation_strings":["Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol. Kharagpur, Kharagpur, , India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol. Kharagpur, Kharagpur, , India","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5108117366"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":0.3448,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.66216199,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"152","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9933000206947327,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8771350383758545},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7328172326087952},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6630423665046692},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.6182135939598083},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5795754194259644},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5362616777420044},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.5250220894813538},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5048506855964661},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.4810052812099457},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4765004515647888},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.4518078565597534},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.44988304376602173},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.44218647480010986},{"id":"https://openalex.org/keywords/mesh-networking","display_name":"Mesh networking","score":0.42414993047714233},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.40931740403175354},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.36582744121551514},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3478710949420929},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14519286155700684},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07808548212051392}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8771350383758545},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7328172326087952},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6630423665046692},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.6182135939598083},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5795754194259644},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5362616777420044},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.5250220894813538},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5048506855964661},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.4810052812099457},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4765004515647888},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.4518078565597534},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.44988304376602173},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.44218647480010986},{"id":"https://openalex.org/C123691950","wikidata":"https://www.wikidata.org/wiki/Q25552104","display_name":"Mesh networking","level":3,"score":0.42414993047714233},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.40931740403175354},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.36582744121551514},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3478710949420929},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14519286155700684},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07808548212051392},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2014.6881041","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2014.6881041","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1966317591","https://openalex.org/W1996095993","https://openalex.org/W2033419605","https://openalex.org/W2056634338","https://openalex.org/W2077505860","https://openalex.org/W2091518118","https://openalex.org/W2111616126","https://openalex.org/W2123184444","https://openalex.org/W2130512670","https://openalex.org/W2134008647","https://openalex.org/W2144832636","https://openalex.org/W4250661686","https://openalex.org/W4253408813","https://openalex.org/W6641900735"],"related_works":["https://openalex.org/W2133942601","https://openalex.org/W3010619501","https://openalex.org/W2161995522","https://openalex.org/W2121335669","https://openalex.org/W2150291485","https://openalex.org/W2390899382","https://openalex.org/W2024473227","https://openalex.org/W2069618434","https://openalex.org/W1998467694","https://openalex.org/W2789216962"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3],"reconfigurable":[4,41],"Network-on-Chip":[5],"(NoC)":[6],"architecture":[7,44],"built":[8],"around":[9],"mesh":[10],"topology.":[11,73],"It":[12,74],"provides":[13],"the":[14,18,71,79],"facility":[15],"of":[16,20,86],"changing":[17],"attachment":[19],"cores":[21],"to":[22,38],"local":[23],"routers":[24],"across":[25],"applications.":[26],"Applications":[27],"share":[28],"cores,":[29],"but":[30],"communication":[31,84],"pattern":[32],"between":[33],"them":[34],"may":[35],"vary.":[36],"Compared":[37],"many":[39],"other":[40],"NoCs,":[42],"our":[43],"needs":[45],"only":[46],"about":[47],"0.2%":[48],"extra":[49],"area":[50],"overhead":[51],"than":[52],"simple":[53],"mesh.":[54],"Application":[55],"mapping":[56],"and":[57,68,95],"reconfiguration":[58,80],"policy":[59],"have":[60],"been":[61,76],"developed":[62],"using":[63],"Integer":[64],"Linear":[65],"Programming":[66],"(ILP)":[67],"heuristic":[69],"for":[70],"proposed":[72],"has":[75],"shown":[77],"that":[78],"strategy":[81],"could":[82],"improve":[83],"costs":[85],"applications":[87],"significantly":[88],"which":[89],"often":[90],"resulted":[91],"in":[92],"improved":[93],"latency":[94],"energy":[96],"values,":[97],"keeping":[98],"throughput":[99],"unaffected.":[100]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}