{"id":"https://openalex.org/W4206576601","doi":"https://doi.org/10.1109/isss.2002.1227157","title":"A case study of hardware and software synthesis in ForSyDe","display_name":"A case study of hardware and software synthesis in ForSyDe","publication_year":2003,"publication_date":"2003-10-01","ids":{"openalex":"https://openalex.org/W4206576601","doi":"https://doi.org/10.1109/isss.2002.1227157"},"language":"en","primary_location":{"id":"doi:10.1109/isss.2002.1227157","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isss.2002.1227157","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"15th International Symposium on System Synthesis, 2002.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072973899","display_name":"Zhonghai Lu","orcid":"https://orcid.org/0000-0003-0061-3475"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":true,"raw_author_name":"Zhonghai Lu","raw_affiliation_strings":["Royal Institute of Technology, Stockholm, Sweden"],"affiliations":[{"raw_affiliation_string":"Royal Institute of Technology, Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024461213","display_name":"Ingo Sander","orcid":"https://orcid.org/0000-0003-4859-3100"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"I. Sander","raw_affiliation_strings":["Royal Institute of Technology, Stockholm, Sweden"],"affiliations":[{"raw_affiliation_string":"Royal Institute of Technology, Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032163732","display_name":"Axel Jantsch","orcid":"https://orcid.org/0000-0003-2251-0004"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"A. Jantsch","raw_affiliation_strings":["Royal Institute of Technology, Stockholm, Sweden"],"affiliations":[{"raw_affiliation_string":"Royal Institute of Technology, Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5072973899"],"corresponding_institution_ids":["https://openalex.org/I86987016"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.37350219,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"86","last_page":"91"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.8452000021934509,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.8452000021934509,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7923789024353027},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.575516939163208},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5632156133651733},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.5014843940734863},{"id":"https://openalex.org/keywords/formal-specification","display_name":"Formal specification","score":0.44819748401641846},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.4305158257484436},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38772475719451904},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3419148325920105},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3315744400024414},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32628172636032104},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.16700178384780884}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7923789024353027},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.575516939163208},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5632156133651733},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.5014843940734863},{"id":"https://openalex.org/C116253237","wikidata":"https://www.wikidata.org/wiki/Q1437424","display_name":"Formal specification","level":2,"score":0.44819748401641846},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.4305158257484436},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38772475719451904},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3419148325920105},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3315744400024414},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32628172636032104},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.16700178384780884},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isss.2002.1227157","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isss.2002.1227157","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"15th International Symposium on System Synthesis, 2002.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320320940","display_name":"Stiftelsen f\u00f6r\u00a0Strategisk Forskning","ror":"https://ror.org/044wr7g58"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3022794856","https://openalex.org/W3047975009","https://openalex.org/W2370083982","https://openalex.org/W2135482679","https://openalex.org/W2035070505","https://openalex.org/W1973862904","https://openalex.org/W2031425765","https://openalex.org/W181593118","https://openalex.org/W2077870657","https://openalex.org/W3215002812"],"abstract_inverted_index":{"ForSyDe":[0,83],"(FORmal":[1],"SYstem":[2],"DEsign)":[3],"is":[4],"a":[5,27,59,74,78,82,89,91,94],"methodology":[6],"which":[7,14,31,56],"addresses":[8],"the":[9,33,36,43,48],"design":[10],"of":[11,35,77],"SoC":[12],"applications":[13],"may":[15],"contain":[16],"control":[17],"as":[18,20,58],"well":[19],"data":[21],"flow":[22],"dominated":[23],"parts.":[24],"Starting":[25],"with":[26,73],"formal":[28],"system":[29],"specification,":[30],"captures":[32],"functionality":[34],"system,":[37],"it":[38],"provides":[39],"refinement":[40],"methods":[41],"inside":[42],"functional":[44],"domain":[45],"to":[46],"transform":[47],"abstract":[49],"specification":[50],"into":[51,64,88],"an":[52],"efficient":[53],"implementation":[54],"model":[55,84],"serves":[57],"starting":[60],"point":[61],"for":[62],"synthesis":[63],"hardware":[65],"and":[66],"software.":[67],"In":[68],"this":[69],"paper":[70],"we":[71],"illustrate":[72],"case":[75],"study":[76],"digital":[79],"equalizer":[80],"how":[81],"can":[85],"be":[86],"synthesized":[87],"hardware,":[90],"software":[92],"or":[93],"combined":[95],"hardware/software":[96],"implementation.":[97]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}