{"id":"https://openalex.org/W1996848030","doi":"https://doi.org/10.1109/issoc.2014.6972443","title":"Fast Memory Region: 3D DRAM memory concept evaluated for JPEG2000 algorithm","display_name":"Fast Memory Region: 3D DRAM memory concept evaluated for JPEG2000 algorithm","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W1996848030","doi":"https://doi.org/10.1109/issoc.2014.6972443","mag":"1996848030"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2014.6972443","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2014.6972443","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Symposium on System-on-Chip (SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010509812","display_name":"Alex Schoenberger","orcid":null},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Alex Schoenberger","raw_affiliation_strings":["TU Darmstadt, Integrated Electronic Systems Lab, Germany","Integrated Electronic Systems Lab, TU Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"TU Darmstadt, Integrated Electronic Systems Lab, Germany","institution_ids":["https://openalex.org/I31512782"]},{"raw_affiliation_string":"Integrated Electronic Systems Lab, TU Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061804977","display_name":"Klaus Hofmann","orcid":"https://orcid.org/0000-0002-6675-0221"},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Klaus Hofmann","raw_affiliation_strings":["TU Darmstadt, Integrated Electronic Systems Lab, Germany","Integrated Electronic Systems Lab, TU Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"TU Darmstadt, Integrated Electronic Systems Lab, Germany","institution_ids":["https://openalex.org/I31512782"]},{"raw_affiliation_string":"Integrated Electronic Systems Lab, TU Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5010509812"],"corresponding_institution_ids":["https://openalex.org/I31512782"],"apc_list":null,"apc_paid":null,"fwci":0.3065,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.56670215,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"pp","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8364195823669434},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6162558794021606},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5612190365791321},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5465892553329468},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.5153821706771851},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.45563971996307373},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.44610610604286194},{"id":"https://openalex.org/keywords/jpeg-2000","display_name":"JPEG 2000","score":0.4239710569381714},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40325862169265747},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4021070897579193},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.39567360281944275},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.38451439142227173},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.19787505269050598},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14164772629737854},{"id":"https://openalex.org/keywords/image-compression","display_name":"Image compression","score":0.12958741188049316},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.08860895037651062},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08753883838653564}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8364195823669434},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6162558794021606},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5612190365791321},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5465892553329468},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.5153821706771851},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.45563971996307373},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.44610610604286194},{"id":"https://openalex.org/C69216139","wikidata":"https://www.wikidata.org/wiki/Q931783","display_name":"JPEG 2000","level":5,"score":0.4239710569381714},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40325862169265747},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4021070897579193},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.39567360281944275},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.38451439142227173},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.19787505269050598},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14164772629737854},{"id":"https://openalex.org/C13481523","wikidata":"https://www.wikidata.org/wiki/Q412438","display_name":"Image compression","level":4,"score":0.12958741188049316},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.08860895037651062},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08753883838653564},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/issoc.2014.6972443","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2014.6972443","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Symposium on System-on-Chip (SoC)","raw_type":"proceedings-article"},{"id":"pmh:oai:tubiblio.ulb.tu-darmstadt.de:124881","is_oa":false,"landing_page_url":"http://tubiblio.ulb.tu-darmstadt.de/124881/","pdf_url":null,"source":{"id":"https://openalex.org/S4377196390","display_name":"TUbilio (Technical University of Darmstadt)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I31512782","host_organization_name":"Technische Universit\u00e4t Darmstadt","host_organization_lineage":["https://openalex.org/I31512782"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Konferenzver\u00f6ffentlichung"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1749461670","https://openalex.org/W1977964157","https://openalex.org/W2013435193","https://openalex.org/W2020261724","https://openalex.org/W2039829692","https://openalex.org/W2040681711","https://openalex.org/W2040901615","https://openalex.org/W2071208935","https://openalex.org/W2104225326","https://openalex.org/W2119912235","https://openalex.org/W2131413854","https://openalex.org/W2159697788","https://openalex.org/W2725179571","https://openalex.org/W3139689176"],"related_works":["https://openalex.org/W3120961607","https://openalex.org/W3148568549","https://openalex.org/W2161286015","https://openalex.org/W1648516568","https://openalex.org/W52283896","https://openalex.org/W361036515","https://openalex.org/W4211178602","https://openalex.org/W2269474412","https://openalex.org/W4386903460","https://openalex.org/W2537599394"],"abstract_inverted_index":{"3D":[0,82],"stacking":[1],"technology":[2],"provides":[3,79],"defined":[4],"connection":[5],"impedance":[6],"and":[7,9,18,63,111],"wide":[8],"flexible":[10],"interface.":[11],"These":[12],"options":[13],"enable":[14],"new":[15],"architecture":[16,85],"approaches":[17],"memory":[19,29,76],"concepts":[20],"for":[21,46,90,114],"DRAM":[22,83],"layers.":[23],"The":[24,93],"most":[25],"important":[26],"findings":[27],"on":[28,108],"usage":[30],"is":[31,36,56,60,100],"locality":[32,88],"principle.":[33],"This":[34,53,68],"principle":[35,89],"formulated":[37],"as":[38],"thumb":[39],"rule":[40],"therefore":[41],"exact":[42],"rate":[43],"requires":[44],"measure":[45,120],"given":[47],"application":[48,59],"using":[49],"trace":[50,127],"driven":[51,128],"simulations.":[52],"big":[54],"overhead":[55,139],"useless":[57],"if":[58],"unknown.":[61],"Averaging":[62],"estimation":[64],"offer":[65],"solutions":[66],"here.":[67],"work":[69],"presents":[70],"Fast":[71],"Memory":[72],"Region":[73],"-":[74],"a":[75],"concept":[77,107],"that":[78,86],"an":[80],"universal":[81],"hardware":[84],"exploits":[87],"any":[91],"application.":[92],"configuration":[94],"step,":[95],"in":[96,102],"contrast":[97],"to":[98,141],"cache,":[99],"located":[101],"software.":[103],"We":[104],"evaluate":[105],"the":[106],"JPEG2000":[109],"algorithm":[110],"show":[112,133],"that,":[113],"encoder":[115],"procedure":[116],"execution,":[117],"all":[118],"necessary":[119],"data":[121],"can":[122],"be":[123],"extracted":[124],"from":[125],"short":[126],"simulation":[129],"runs.":[130],"Simulations":[131],"results":[132],"5%":[134],"reduction":[135],"of":[136],"run":[137],"time":[138],"compared":[140],"cache":[142],"acceleration":[143],"only.":[144]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2026-02-26T08:16:20.718346","created_date":"2025-10-10T00:00:00"}