{"id":"https://openalex.org/W2152804344","doi":"https://doi.org/10.1109/issoc.2008.4694878","title":"Congestion-aware task mapping in heterogeneous MPSoCs","display_name":"Congestion-aware task mapping in heterogeneous MPSoCs","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W2152804344","doi":"https://doi.org/10.1109/issoc.2008.4694878","mag":"2152804344"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2008.4694878","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2008.4694878","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Symposium on System-on-Chip","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108533403","display_name":"Ewerson Carvalho","orcid":null},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Ewerson Carvalho","raw_affiliation_strings":["Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul, Porto Alegre, Rio Grande do Sul, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul, Porto Alegre, Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I45643870"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025418231","display_name":"Fernando Moraes","orcid":"https://orcid.org/0000-0001-6126-6847"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Fernando Moraes","raw_affiliation_strings":["Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul, Porto Alegre, Rio Grande do Sul, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul, Porto Alegre, Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I45643870"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I45643870"],"apc_list":null,"apc_paid":null,"fwci":6.1025,"has_fulltext":false,"cited_by_count":67,"citation_normalized_percentile":{"value":0.96516475,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"53 11","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.8984357118606567},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8017913103103638},{"id":"https://openalex.org/keywords/heuristics","display_name":"Heuristics","score":0.6103119254112244},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5625872015953064},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.555095374584198},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5450218319892883},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5313186049461365},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5037743449211121},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5007221698760986},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4776709973812103},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.46228528022766113},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3673270344734192},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.24847131967544556},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08065834641456604}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.8984357118606567},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8017913103103638},{"id":"https://openalex.org/C127705205","wikidata":"https://www.wikidata.org/wiki/Q5748245","display_name":"Heuristics","level":2,"score":0.6103119254112244},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5625872015953064},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.555095374584198},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5450218319892883},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5313186049461365},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5037743449211121},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5007221698760986},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4776709973812103},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.46228528022766113},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3673270344734192},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.24847131967544556},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08065834641456604},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2008.4694878","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2008.4694878","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Symposium on System-on-Chip","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.6499999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W136149018","https://openalex.org/W1537756951","https://openalex.org/W2022673945","https://openalex.org/W2079726719","https://openalex.org/W2082921355","https://openalex.org/W2097036543","https://openalex.org/W2102009126","https://openalex.org/W2118662070","https://openalex.org/W2124990521","https://openalex.org/W2125258741","https://openalex.org/W2125357468","https://openalex.org/W2129286064","https://openalex.org/W2142386205","https://openalex.org/W2146981302","https://openalex.org/W2152099665","https://openalex.org/W2161350011","https://openalex.org/W2164703619","https://openalex.org/W6655917995","https://openalex.org/W6671050857"],"related_works":["https://openalex.org/W4281711577","https://openalex.org/W2106200299","https://openalex.org/W2178653557","https://openalex.org/W2540211551","https://openalex.org/W2994908368","https://openalex.org/W1975982080","https://openalex.org/W2144357574","https://openalex.org/W4230458348","https://openalex.org/W1966325333","https://openalex.org/W3198758847"],"abstract_inverted_index":{"Multiprocessors":[0],"systems-on-chip":[1],"(MPSoCs)":[2],"are":[3],"a":[4,45],"trend":[5],"in":[6,44,54,70,80,99],"VLSI":[7],"design,":[8],"since":[9,64],"they":[10],"minimize":[11],"the":[12,17,20,24,65,71,75,94,110,115],"design":[13,27],"crisis":[14],"represented":[15],"by":[16],"gap":[18],"between":[19],"silicon":[21],"technology":[22],"and":[23,40,120],"actual":[25],"SoC":[26],"capacity.":[28],"MPSoCs":[29,55],"may":[30,73],"employ":[31],"NoCs":[32],"to":[33],"integrate":[34],"several":[35],"programmable":[36],"processors,":[37],"specialized":[38],"memories,":[39],"other":[41],"specific":[42],"IPs":[43],"scalable":[46],"way.":[47],"Besides":[48],"communication":[49],"infrastructure,":[50],"another":[51],"important":[52],"issue":[53],"is":[56,62],"task":[57,60],"mapping.":[58],"Dynamic":[59],"mapping":[61,84,97],"needed,":[63],"number":[66],"of":[67,96,109],"tasks":[68],"running":[69],"MPSoC":[72],"exceed":[74],"available":[76],"resources.":[77],"Most":[78],"works":[79],"literature":[81],"present":[82],"static":[83],"solutions,":[85],"not":[86],"appropriate":[87],"for":[88],"this":[89],"scenario.":[90],"This":[91],"paper":[92],"investigates":[93],"performance":[95],"algorithms":[98],"NoC-based":[100],"heterogeneous":[101],"MPSoCs,":[102],"targeting":[103],"NoC":[104,116],"congestion":[105],"minimization.":[106],"The":[107],"use":[108],"proposed":[111],"congestion-aware":[112],"heuristics":[113],"reduces":[114],"channel":[117],"load,":[118],"congestion,":[119],"packet":[121],"latency.":[122]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":8},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":12},{"year":2012,"cited_by_count":7}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}