{"id":"https://openalex.org/W2544170974","doi":"https://doi.org/10.1109/issoc.2005.1595660","title":"Reliable Asynchronous Links for SoC","display_name":"Reliable Asynchronous Links for SoC","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2544170974","doi":"https://doi.org/10.1109/issoc.2005.1595660","mag":"2544170974"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2005.1595660","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2005.1595660","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 International Symposium on System-on-Chip","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061073517","display_name":"Ethiopia Nigussie","orcid":"https://orcid.org/0000-0002-2043-4274"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"E. Nigussie","raw_affiliation_strings":["Communication Systems Laboratory, Department of Information Technology, University of Turku, Turku, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Communication Systems Laboratory, Department of Information Technology, University of Turku, Turku, Finland","institution_ids":["https://openalex.org/I155660961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075314597","display_name":"Juha Plosila","orcid":"https://orcid.org/0000-0003-4018-5495"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"J. Plosila","raw_affiliation_strings":["Communication Systems Laboratory, Department of Information Technology, University of Turku, Turku, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Communication Systems Laboratory, Department of Information Technology, University of Turku, Turku, Finland","institution_ids":["https://openalex.org/I155660961"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055846108","display_name":"Jouni Isoaho","orcid":"https://orcid.org/0000-0002-5789-3992"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"J. Isoaho","raw_affiliation_strings":["Communication Systems Laboratory, Department of Information Technology, University of Turku, Turku, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Communication Systems Laboratory, Department of Information Technology, University of Turku, Turku, Finland","institution_ids":["https://openalex.org/I155660961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.3912469,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"124","last_page":"127"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8929468393325806},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.779056191444397},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.7261772155761719},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.6024124622344971},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5845915079116821},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5289998650550842},{"id":"https://openalex.org/keywords/clock-synchronization","display_name":"Clock synchronization","score":0.5074025988578796},{"id":"https://openalex.org/keywords/communication-link","display_name":"Communication link","score":0.4636130928993225},{"id":"https://openalex.org/keywords/link","display_name":"Link (geometry)","score":0.46350449323654175},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46009984612464905},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.45664283633232117},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.3080763816833496},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.30362313985824585},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2574637830257416},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1790894865989685},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.11302980780601501},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10527554154396057},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07676199078559875}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8929468393325806},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.779056191444397},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.7261772155761719},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.6024124622344971},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5845915079116821},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5289998650550842},{"id":"https://openalex.org/C129891060","wikidata":"https://www.wikidata.org/wiki/Q1513059","display_name":"Clock synchronization","level":4,"score":0.5074025988578796},{"id":"https://openalex.org/C2986660100","wikidata":"https://www.wikidata.org/wiki/Q1172466","display_name":"Communication link","level":2,"score":0.4636130928993225},{"id":"https://openalex.org/C2778753846","wikidata":"https://www.wikidata.org/wiki/Q6554239","display_name":"Link (geometry)","level":2,"score":0.46350449323654175},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46009984612464905},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.45664283633232117},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.3080763816833496},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.30362313985824585},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2574637830257416},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1790894865989685},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.11302980780601501},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10527554154396057},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07676199078559875},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2005.1595660","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2005.1595660","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 International Symposium on System-on-Chip","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1544623790","https://openalex.org/W2132998828","https://openalex.org/W2158263501","https://openalex.org/W2487142227"],"related_works":["https://openalex.org/W2147289961","https://openalex.org/W364924225","https://openalex.org/W2617270062","https://openalex.org/W2389820945","https://openalex.org/W2392383039","https://openalex.org/W1993985975","https://openalex.org/W142020038","https://openalex.org/W2108168368","https://openalex.org/W2325117947","https://openalex.org/W2093992207"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"two":[3,8,117],"asynchronous":[4,24],"links":[5,104,112],"between":[6,51,83],"any":[7,65],"independently":[9],"clocked":[10],"synchronous":[11,22,128,141],"modules.":[12],"The":[13,48,67,97,146],"first":[14],"link":[15,42,55,69,89,118],"is":[16,43,56,60,81,91],"based":[17],"on":[18],"using":[19,150],"synchronizers":[20],"and":[21,23,76,85,99,135],"FIFOs":[25],"which":[26,59,108],"compensates":[27],"the":[28,38,116,121,132,144,151],"increase":[29],"of":[30,40,53,102,123,139,154],"latency":[31,39,98],"due":[32],"to":[33,36,45],"synchronization.":[34],"Due":[35],"this":[37,41,54,88],"reduced":[44],"2.08":[46],"nsec.":[47],"mean":[49],"time":[50],"failures":[52],"35":[57],"years,":[58],"more":[61],"than":[62],"enough":[63],"for":[64,72,113],"design.":[66],"second":[68],"generates":[70],"clock":[71],"each":[73,127],"module":[74,84],"locally":[75],"stops":[77],"it":[78,130],"whenever":[79],"there":[80,90],"communication":[82],"link.":[86],"In":[87],"no":[92],"synchronization":[93],"failure":[94],"at":[95],"all.":[96],"power":[100],"consumption":[101],"both":[103],"are":[105,148],"very":[106],"small":[107],"makes":[109,131],"them":[110],"efficient":[111],"SoC.":[114],"Since":[115],"architectures":[119],"allow":[120],"use":[122],"different":[124,140],"clocks":[125],"in":[126,143],"module,":[129],"system":[133],"modular":[134],"enables":[136],"easy":[137],"re-usage":[138],"modules":[142],"system.":[145],"circuits":[147],"simulated":[149],"analog":[152],"environment":[153],"Spectre":[155],"with":[156],"0.13":[157],"mum":[158],"technology.":[159]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}