{"id":"https://openalex.org/W2537920780","doi":"https://doi.org/10.1109/issoc.2004.1411149","title":"Comparison of hardware IP components for system-on-chip","display_name":"Comparison of hardware IP components for system-on-chip","publication_year":2005,"publication_date":"2005-03-31","ids":{"openalex":"https://openalex.org/W2537920780","doi":"https://doi.org/10.1109/issoc.2004.1411149","mag":"2537920780"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2004.1411149","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411149","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078390067","display_name":"Erno Salminen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"E. Salminen","raw_affiliation_strings":["Institute of Digital and Computer Systems, Tampere University of Technology, Tampere, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Digital and Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010907476","display_name":"Kimmo Kuusilinna","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"K. Kuusilinna","raw_affiliation_strings":["Institute of Digital and Computer Systems, Tampere University of Technology, Tampere, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Digital and Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102937415","display_name":"Timo D. H\u00e4m\u00e4l\u00e4inen","orcid":"https://orcid.org/0000-0002-7867-0800"},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"T.D. Hamalainen","raw_affiliation_strings":["Institute of Digital and Computer Systems, Tampere University of Technology, Tampere, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Digital and Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5281,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.71855362,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2","issue":null,"first_page":"69","last_page":"73"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/intellectual-property","display_name":"Intellectual property","score":0.7133978605270386},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6604310274124146},{"id":"https://openalex.org/keywords/limit","display_name":"Limit (mathematics)","score":0.5782835483551025},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4892842471599579},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.4623523950576782},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.4608438014984131},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4434944987297058},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4154696464538574},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3305304944515228},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19565364718437195},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.18057623505592346},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10205352306365967},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08080166578292847}],"concepts":[{"id":"https://openalex.org/C34974158","wikidata":"https://www.wikidata.org/wiki/Q131257","display_name":"Intellectual property","level":2,"score":0.7133978605270386},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6604310274124146},{"id":"https://openalex.org/C151201525","wikidata":"https://www.wikidata.org/wiki/Q177239","display_name":"Limit (mathematics)","level":2,"score":0.5782835483551025},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4892842471599579},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.4623523950576782},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.4608438014984131},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4434944987297058},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4154696464538574},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3305304944515228},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19565364718437195},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.18057623505592346},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10205352306365967},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08080166578292847},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2004.1411149","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411149","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1590232726","https://openalex.org/W1661576583","https://openalex.org/W1738875156","https://openalex.org/W1870804978","https://openalex.org/W2007220779","https://openalex.org/W2026725188","https://openalex.org/W2101615752","https://openalex.org/W2101647015","https://openalex.org/W2111701388","https://openalex.org/W2113790452","https://openalex.org/W2123783918","https://openalex.org/W2133355890","https://openalex.org/W2135014504","https://openalex.org/W2138616176","https://openalex.org/W2150997368","https://openalex.org/W2490203607","https://openalex.org/W2534913894","https://openalex.org/W4230027260","https://openalex.org/W6656870755","https://openalex.org/W6678219433","https://openalex.org/W6679964792"],"related_works":["https://openalex.org/W1998011869","https://openalex.org/W4213209802","https://openalex.org/W4298146316","https://openalex.org/W2236267847","https://openalex.org/W631166945","https://openalex.org/W4282843169","https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2115579119","https://openalex.org/W2136854845"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"a":[3],"brief":[4],"comparison":[5,85],"of":[6,33,48,55],"both":[7],"academic":[8],"and":[9,29,35,86],"commercial":[10],"intellectual":[11],"property":[12],"(IP)":[13],"components.":[14],"The":[15],"aim":[16],"is":[17,77,88,94],"to":[18,21,59,67],"gain":[19],"insight":[20],"contemporary":[22,62],"IP":[23,63,75,84],"components":[24,49,64],"regarding":[25],"their":[26],"application":[27],"domains":[28],"cost":[30],"in":[31,42,52],"terms":[32],"area":[34],"energy.":[36],"It":[37],"has":[38],"been":[39],"estimated":[40],"that":[41],"the":[43,45,53,72],"future":[44],"maximum":[46],"size":[47,69],"must":[50],"be":[51],"range":[54],"50-100":[56],"kilogates.":[57],"According":[58],"this":[60,68],"study,":[61],"mostly":[65],"conform":[66],"limit.":[70],"Selecting":[71],"most":[73],"appropriate":[74],"candidates":[76],"crucial":[78],"for":[79],"successful":[80],"SoC":[81],"design.":[82],"However,":[83],"selection":[87],"hard":[89],"since":[90],"even":[91],"basic":[92],"information":[93],"often":[95],"missing.":[96]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
