{"id":"https://openalex.org/W2546120269","doi":"https://doi.org/10.1109/issoc.2004.1411141","title":"Stream architectures - efficiency and programmability","display_name":"Stream architectures - efficiency and programmability","publication_year":2005,"publication_date":"2005-03-31","ids":{"openalex":"https://openalex.org/W2546120269","doi":"https://doi.org/10.1109/issoc.2004.1411141","mag":"2546120269"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2004.1411141","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411141","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013680653","display_name":"Mattan Erez","orcid":"https://orcid.org/0000-0002-1567-4097"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"M. Erez","raw_affiliation_strings":["University of Stanford, USA"],"affiliations":[{"raw_affiliation_string":"University of Stanford, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5013680653"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.35884354,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"41","last_page":"41"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8610923290252686},{"id":"https://openalex.org/keywords/stream-processing","display_name":"Stream processing","score":0.7028347253799438},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5771595239639282},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4387873113155365},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.42857950925827026},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41777732968330383}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8610923290252686},{"id":"https://openalex.org/C107027933","wikidata":"https://www.wikidata.org/wiki/Q2006448","display_name":"Stream processing","level":2,"score":0.7028347253799438},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5771595239639282},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4387873113155365},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.42857950925827026},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41777732968330383},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2004.1411141","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411141","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7200000286102295,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2389214306","https://openalex.org/W4235240664","https://openalex.org/W2965083567","https://openalex.org/W1838576100","https://openalex.org/W2095886385","https://openalex.org/W3016417755","https://openalex.org/W2889616422","https://openalex.org/W2089704382","https://openalex.org/W1983399550","https://openalex.org/W4401278057"],"abstract_inverted_index":{"Summary":[0],"form":[1],"only":[2],"given.":[3],"Stream":[4],"processors":[5,53],"are":[6,14,93,212],"fully":[7],"programmable":[8],"in":[9,44,158,168],"a":[10,33,39,62,98,123,128,133,192,220],"high-level":[11,146],"language,":[12],"yet":[13],"capable":[15],"of":[16,51,71,76,89,148,165,237],"achieving":[17],"computation":[18],"efficiency":[19,70],"comparable":[20],"to":[21,38,57,78,107,125,136,143,153,186,256],"fixed-function":[22],"ASIC":[23,261],"solutions":[24],"(about":[25],"20":[26,79],"pJ/op)":[27],"and":[28,74,100,113,119,150,172,180,198,208,235,249,260],"can":[29],"be":[30],"scaled":[31],"from":[32,111],"Gop/s":[34],"(20":[35,41,81],"mW)":[36],"block":[37],"Top/s":[40,80],"W)":[42],"chip":[43],"current":[45],"semiconductor":[46],"technology.":[47,60],"The":[48],"parallel":[49],"nature":[50],"stream":[52,84,129,221,244,246],"enables":[54,122],"their":[55],"performance":[56,75],"scale":[58],"with":[59,95],"In":[61],"2010":[63],"45":[64],"nm":[65],"technology":[66],"we":[67],"expect":[68],"an":[69,87],"1":[72],"pJ/op":[73],"up":[77],"W).":[82],"A":[83,252],"processor":[85,222],"contains":[86],"array":[88],"arithmetic":[90],"units":[91],"that":[92],"supplied":[94],"data":[96,156,171],"by":[97],"deep":[99],"explicit":[101,163],"register":[102],"hierarchy,":[103],"which":[104,218],"also":[105,213],"serves":[106],"decouple":[108],"instruction":[109,173],"execution":[110],"unpredictable":[112],"long-latency":[114],"memory":[115],"operations.":[116],"This":[117,162,241],"decoupled":[118],"exposed-communication":[120],"architecture":[121],"compiler":[124],"automatically":[126],"map":[127],"application":[130],"(such":[131],"as":[132,229],"signal-flow":[134],"graph)":[135],"the":[137,145,155,159,215,225,232,238],"processing":[138],"array:":[139],"employing":[140],"\"stream":[141],"scheduling\"":[142,152],"stage":[144],"movement":[147,157,174],"streams,":[149],"\"communication":[151],"schedule":[154],"low-level":[160],"kernels.":[161],"optimization":[164],"communication":[166],"results":[167],"almost":[169,182],"all":[170,183],"taking":[175],"place":[176],"over":[177],"short":[178],"wires,":[179],"hence":[181],"energy":[184],"going":[185],"useful":[187],"computation.":[188],"We":[189,211],"have":[190,199],"built":[191],"prototype":[193],"streaming":[194,201,239,250],"signal":[195],"processor,":[196],"Imagine,":[197,230],"demonstrated":[200],"applications":[202],"involving":[203],"video":[204],"compression/decompression,":[205],"wireless":[206],"communication,":[207],"adaptive":[209],"beam-forming.":[210],"designing":[214],"Merrimac":[216],"supercomputer,":[217],"uses":[219],"based":[223],"on":[224],"same":[226],"architectural":[227],"principles":[228],"illustrating":[231],"flexibility,":[233],"generality,":[234],"scalability":[236],"concept.":[240],"paper":[242],"describes":[243],"architectures,":[245],"programming":[247],"systems,":[248],"applications.":[251],"comparison":[253],"is":[254],"made":[255],"conventional":[257],"DSPs,":[258],"FPGAs,":[259],"solutions.":[262]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
