{"id":"https://openalex.org/W2544439045","doi":"https://doi.org/10.1109/issoc.2004.1411137","title":"Design of a guaranteed throughput router for on-chip networks","display_name":"Design of a guaranteed throughput router for on-chip networks","publication_year":2005,"publication_date":"2005-03-31","ids":{"openalex":"https://openalex.org/W2544439045","doi":"https://doi.org/10.1109/issoc.2004.1411137","mag":"2544439045"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2004.1411137","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411137","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002742625","display_name":"S. Sathe","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"S. Sathe","raw_affiliation_strings":["Department ofE.E., Link\u00f6ping University, Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department ofE.E., Link\u00f6ping University, Sweden","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033341606","display_name":"Daniel Wiklund","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"D. Wiklund","raw_affiliation_strings":["Department ofE.E., Link\u00f6ping University, Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department ofE.E., Link\u00f6ping University, Sweden","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007165031","display_name":"D. Liu","orcid":"https://orcid.org/0000-0002-6431-8515"},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"D. Liu","raw_affiliation_strings":["Department ofE.E., Link\u00f6ping University, Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department ofE.E., Link\u00f6ping University, Sweden","institution_ids":["https://openalex.org/I102134673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I102134673"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.4025214,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"25","last_page":"28"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9933000206947327,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9855999946594238,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.8618148565292358},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.713697075843811},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6713035106658936},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6515792012214661},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6107829213142395},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.6106312274932861},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6082150936126709},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.6041097640991211},{"id":"https://openalex.org/keywords/one-armed-router","display_name":"One-armed router","score":0.5732720494270325},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.528915286064148},{"id":"https://openalex.org/keywords/core-router","display_name":"Core router","score":0.521937370300293},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.48713037371635437},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.46781492233276367},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4217613637447357},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.12498670816421509},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12190395593643188},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11434686183929443}],"concepts":[{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.8618148565292358},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.713697075843811},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6713035106658936},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6515792012214661},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6107829213142395},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6106312274932861},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6082150936126709},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.6041097640991211},{"id":"https://openalex.org/C152174988","wikidata":"https://www.wikidata.org/wiki/Q7092301","display_name":"One-armed router","level":3,"score":0.5732720494270325},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.528915286064148},{"id":"https://openalex.org/C86726114","wikidata":"https://www.wikidata.org/wiki/Q5170211","display_name":"Core router","level":3,"score":0.521937370300293},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.48713037371635437},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.46781492233276367},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4217613637447357},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.12498670816421509},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12190395593643188},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11434686183929443},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2004.1411137","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411137","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1544550411","https://openalex.org/W1593266071","https://openalex.org/W1946139549","https://openalex.org/W2011403724","https://openalex.org/W2084691364","https://openalex.org/W2096856647","https://openalex.org/W2123184444","https://openalex.org/W2146421115","https://openalex.org/W2160642395","https://openalex.org/W2162660599","https://openalex.org/W4245203543","https://openalex.org/W4252230152","https://openalex.org/W4254440925","https://openalex.org/W4317415789","https://openalex.org/W6848834439"],"related_works":["https://openalex.org/W2603824091","https://openalex.org/W2560886726","https://openalex.org/W2013729863","https://openalex.org/W4212914479","https://openalex.org/W3181500061","https://openalex.org/W2138410650","https://openalex.org/W2091258882","https://openalex.org/W2510977931","https://openalex.org/W2991086289","https://openalex.org/W2154592323"],"abstract_inverted_index":{"The":[0,38,61,83],"complexity":[1],"of":[2,22,41,52,68,80,94],"system-on-chip":[3],"(SoC)":[4],"designs":[5],"continues":[6],"to":[7,17,34],"increase,":[8],"and":[9,70,74,88],"traditional":[10],"bus-based":[11],"interconnects":[12],"will":[13],"not":[14],"be":[15],"sufficient":[16],"manage":[18],"the":[19,42,45,81],"communication":[20],"requirements":[21],"future":[23],"billion":[24],"transistor":[25],"chips.":[26],"On-chip":[27],"networks":[28],"(OCNs)":[29],"provide":[30],"a":[31,49,53,66,76],"scalable":[32,56],"alternative":[33],"existing":[35],"on-chip":[36],"interconnects.":[37],"key":[39],"element":[40],"OCN":[43],"is":[44,63,75,89],"router":[46,60,62,84],"We":[47],"present":[48],"prototype":[50],"design":[51],"5-input,":[54],"5-output,":[55],"guaranteed":[57],"throughput":[58],"(GT)":[59],"constructed":[64],"from":[65],"collection":[67],"parameterizable":[69],"reusable":[71],"hardware":[72],"blocks":[73],"basic":[77],"building":[78],"block":[79],"OCN.":[82],"supports":[85],"wormhole":[86],"routing,":[87],"characterized":[90],"by":[91],"an":[92],"area":[93],"0.1":[95],"mm/sup":[96],"2/":[97],"in":[98],"0.18":[99],"micron":[100],"CMOS":[101],"technology.":[102]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}