{"id":"https://openalex.org/W2540500304","doi":"https://doi.org/10.1109/issoc.2004.1411133","title":"Spidergon: a novel on-chip communication network","display_name":"Spidergon: a novel on-chip communication network","publication_year":2005,"publication_date":"2005-03-31","ids":{"openalex":"https://openalex.org/W2540500304","doi":"https://doi.org/10.1109/issoc.2004.1411133","mag":"2540500304"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2004.1411133","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411133","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009787535","display_name":"Marcello Coppola","orcid":"https://orcid.org/0000-0003-0414-9411"},"institutions":[{"id":"https://openalex.org/I4210124177","display_name":"STMicroelectronics (Czechia)","ror":"https://ror.org/03c7ss521","country_code":"CZ","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210124177"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"M. Coppola","raw_affiliation_strings":["AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics Limited"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics Limited","institution_ids":["https://openalex.org/I4210124177"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050816276","display_name":"Riccardo Locatelli","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124177","display_name":"STMicroelectronics (Czechia)","ror":"https://ror.org/03c7ss521","country_code":"CZ","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210124177"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"R. Locatelli","raw_affiliation_strings":["AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics Limited"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics Limited","institution_ids":["https://openalex.org/I4210124177"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043757669","display_name":"Giuseppe Maruccia","orcid":null},"institutions":[{"id":"https://openalex.org/I4210135508","display_name":"STMicroelectronics (United Kingdom)","ror":"https://ror.org/0442wxc77","country_code":"GB","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210135508"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"G. Maruccia","raw_affiliation_strings":["AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics, UK","institution_ids":["https://openalex.org/I4210135508"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051767666","display_name":"Lorenzo Pieralisi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124177","display_name":"STMicroelectronics (Czechia)","ror":"https://ror.org/03c7ss521","country_code":"CZ","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210124177"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"L. Pieralisi","raw_affiliation_strings":["AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics Limited"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics Limited","institution_ids":["https://openalex.org/I4210124177"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029677878","display_name":"Alberto Scandurra","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124177","display_name":"STMicroelectronics (Czechia)","ror":"https://ror.org/03c7ss521","country_code":"CZ","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210124177"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"A. Scandurra","raw_affiliation_strings":["AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics Limited"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AST Grenoble Laboratory and CMG Design Catania, STMicroelectronics Limited","institution_ids":["https://openalex.org/I4210124177"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":13.9671,"has_fulltext":false,"cited_by_count":197,"citation_normalized_percentile":{"value":0.98902688,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"15","last_page":"15"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6970571875572205},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6939276456832886},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6199852824211121},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5897643566131592},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5799118280410767},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5504187941551208},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.5366508364677429},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5275865197181702},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5058186054229736},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.4101129174232483},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.33476272225379944},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.29920417070388794}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6970571875572205},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6939276456832886},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6199852824211121},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5897643566131592},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5799118280410767},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5504187941551208},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.5366508364677429},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5275865197181702},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5058186054229736},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.4101129174232483},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.33476272225379944},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.29920417070388794},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2004.1411133","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411133","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5199999809265137}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1548168045","https://openalex.org/W2032661585","https://openalex.org/W4253638730"],"related_works":["https://openalex.org/W2018755015","https://openalex.org/W2360310172","https://openalex.org/W2135981148","https://openalex.org/W2065289416","https://openalex.org/W2388672758","https://openalex.org/W2144357574","https://openalex.org/W2754086592","https://openalex.org/W2017236304","https://openalex.org/W2115579119","https://openalex.org/W4230458348"],"abstract_inverted_index":{"Summary":[0],"form":[1],"only":[2],"given.":[3],"The":[4],"SoC":[5,113],"(System":[6],"on":[7,78],"Chip)":[8],"design":[9],"demands":[10],"for":[11,103],"novel":[12],"architectural":[13],"and":[14,31,42,74,108,117],"circuital":[15],"solutions":[16],"to":[17,44],"cope":[18],"with":[19],"the":[20,25,35,38,87,98,104,115,123,135,143],"global":[21],"wires":[22],"issue,":[23],"pushing":[24],"on-chip":[26,54,92,128],"communication":[27,39,71,93,129],"as":[28,142],"a":[29,45,64,68],"crucial":[30],"precious":[32],"resource.":[33],"In":[34],"context":[36],"of":[37,89,97,106,140,146],"centric":[40],"paradigm":[41],"according":[43],"layered":[46],"based":[47],"design,":[48],"it":[49],"is":[50,95],"foreseen":[51],"that":[52,86],"current":[53],"shared":[55],"bus":[56],"will":[57],"be,":[58],"at":[59],"least":[60],"partially,":[61],"replaced":[62],"by":[63,134],"micronetwork":[65],"interconnection":[66],"implementing":[67],"flexible":[69],"packet-based":[70],"(A.":[72],"Jantsch":[73],"H.":[75],"Tenhunen,":[76],"\"Networks":[77],"Chip\",":[79],"Kluwer":[80],"Academic":[81],"Publishers,":[82],"2003).":[83],"We":[84],"state":[85],"availability":[88],"an":[90],"efficient":[91,107],"platform":[94],"one":[96],"most":[99],"important":[100],"enabling":[101],"factors":[102],"development":[105],"cost":[109],"effective":[110],"multi":[111],"processor":[112],"in":[114],"near":[116],"long-term":[118],"future.":[119],"This":[120],"summary":[121],"presents":[122],"low":[124],"cost,":[125],"high":[126],"performance":[127],"network,":[130],"called":[131],"Spidergon,":[132],"developed":[133],"AST":[136],"(Advanced":[137],"System":[138],"Technology)":[139],"STMicroelectronics":[141],"possible":[144],"evolution":[145],"STBus":[147],"technology.":[148]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":8},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":8},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":11},{"year":2013,"cited_by_count":10},{"year":2012,"cited_by_count":19}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}