{"id":"https://openalex.org/W2538848892","doi":"https://doi.org/10.1109/issoc.2004.1411051","title":"Implementing a single-processor cellular modem on an SC1000-family core","display_name":"Implementing a single-processor cellular modem on an SC1000-family core","publication_year":2005,"publication_date":"2005-03-31","ids":{"openalex":"https://openalex.org/W2538848892","doi":"https://doi.org/10.1109/issoc.2004.1411051","mag":"2538848892"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2004.1411051","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411051","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026777082","display_name":"Stefano Angioni","orcid":"https://orcid.org/0000-0002-2314-0028"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Angioni","raw_affiliation_strings":["System Application Engineer, SturCore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Application Engineer, SturCore","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090414713","display_name":"F. Lazare","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"F. Lazare","raw_affiliation_strings":["TTP Communications Limited"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TTP Communications Limited","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.35860719,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"3","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9646999835968018,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9646999835968018,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10575","display_name":"Wireless Communication Networks Research","score":0.939300000667572,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8064079880714417},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5630589127540588},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.558003842830658},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5365246534347534},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.524499773979187},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5218114852905273},{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.508794367313385},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.4908483624458313},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.4603900611400604},{"id":"https://openalex.org/keywords/baseband","display_name":"Baseband","score":0.45939040184020996},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.45833662152290344},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4115784764289856},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4101756513118744},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.3487163782119751},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3036392331123352},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.20432236790657043},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12417170405387878}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8064079880714417},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5630589127540588},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.558003842830658},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5365246534347534},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.524499773979187},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5218114852905273},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.508794367313385},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.4908483624458313},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.4603900611400604},{"id":"https://openalex.org/C65165936","wikidata":"https://www.wikidata.org/wiki/Q575784","display_name":"Baseband","level":3,"score":0.45939040184020996},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.45833662152290344},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4115784764289856},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4101756513118744},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3487163782119751},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3036392331123352},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.20432236790657043},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12417170405387878},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2004.1411051","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2004.1411051","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1547865754","https://openalex.org/W2276000909","https://openalex.org/W4250432526","https://openalex.org/W2101536355","https://openalex.org/W2171175484","https://openalex.org/W2085872434","https://openalex.org/W2562747857","https://openalex.org/W1980880153","https://openalex.org/W4308095153","https://openalex.org/W2026084820"],"abstract_inverted_index":{"The":[0],"much-heralded":[1],"concept":[2],"of":[3,16],"creating":[4],"a":[5,32,37,44,67,95],"single-processor":[6],"cellular":[7,18],"modem":[8],"has":[9],"now":[10],"become":[11],"reality.":[12],"TTPCom's":[13],"latest":[14],"version":[15],"their":[17],"baseband":[19],"engine":[20],"(CBE":[21],"2000)":[22],"combines":[23],"both":[24,82],"digital":[25],"signal":[26,83],"processor":[27],"and":[28,54,85,91],"microcontroller":[29],"functions":[30],"on":[31],"single":[33],"processor,":[34],"resulting":[35],"in":[36,89],"greatly":[38],"simplified":[39],"programming":[40,56],"model.":[41],"This":[42],"provides":[43],"more":[45],"flexible":[46],"way":[47],"to":[48,80],"partition":[49],"tasks":[50],"for":[51],"easier":[52],"maintenance":[53],"higher":[55],"efficiency.":[57],"In":[58],"this":[59],"paper,":[60],"we":[61],"present":[62],"an":[63],"innovation":[64],"that":[65],"demonstrates":[66],"new":[68],"system":[69],"architecture.":[70],"StarCore's":[71],"VLES":[72],"(variable-length":[73],"execution":[74],"set)":[75],"technology":[76],"allows":[77],"software":[78],"developers":[79],"develop":[81],"processing":[84],"control":[86],"code":[87],"entirely":[88],"C":[90],"compile":[92],"it":[93],"into":[94],"seamlessly":[96],"integrated":[97],"application.":[98]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}